Spread spectrum clock generator

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Reexamination Certificate

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08045666

ABSTRACT:
Disclosed are embodiments of methods and circuits to generate spread spectrum clocks.

REFERENCES:
patent: 6943606 (2005-09-01), Dunning et al.
patent: 2004/0212412 (2004-10-01), Saeki
patent: 2007/0001882 (2007-01-01), Zhang et al.
patent: 2007/0041486 (2007-02-01), Shin
Aoyama et al., “3Gbps, 5000ppm Spread Spectrum SerDes PHY with frequency tracking Phase Interpolator for Serial ATA”, Symposium on VLSI Circuits Digest of Technical Papers, 2003, pp. 107-110.
Sugawara et al., “1.5 Gbps, 5150 ppm Spread Spectrum SerDes PHY with a 0.3 mW, 1.5 Gbps Level Detector for Serial ATA”, Symposium on VLSI Circuits Digest of Technical Papers, 2002, pp. 60-63.
Kim et al., “Spread Spectrum Clock Generator With Delay Cell Array to Reduce Electromagnetic Interference”, IEEE Transactions On Electromagnetic Compatibility, vol. 47, Issue No. 4, Nov. 2005, pp. 908-920.

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