Boots – shoes – and leggings
Patent
1978-12-26
1981-04-21
Thesz, Joseph M.
Boots, shoes, and leggings
G06F 104, G06F 300
Patent
active
042636485
ABSTRACT:
Apparatus in a Cathode Ray Tube (CRT) display allows the sharing of the system bus between the microprocessor (CPU) and Direct Memory Access (DMA) devices without degrading the CPU performance by splitting the system bus cycle into an address phase and a data phase.
REFERENCES:
patent: 3962682 (1976-06-01), Bennett
patent: 4004283 (1977-01-01), Bennett et al.
patent: 4041469 (1977-08-01), Jennings
patent: 4075695 (1978-02-01), Lelke
patent: 4121283 (1978-10-01), Walker
"M6800 Microprocessor Application Manual", Motorola Inc., 1975, pp. 4-1 to 4-13, 4-31 to 4-42, 6-10 to 6-12.
Kobs Frederick E.
Ryan Joseph L.
Slater Richard A.
Stafford John P.
Chan Eddie
Grayson George
Honeywell Information Systems Inc.
Prasinos Nicholas
Reiling Ronald T.
LandOfFree
Split system bus cycle for direct memory access of peripherals i does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Split system bus cycle for direct memory access of peripherals i, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Split system bus cycle for direct memory access of peripherals i will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-561105