Split gate flash memory cell and fabrication method thereof

Details Split gate flash memory cell and fabrication method thereof Split gate flash memory cell and fabrication method thereof

2006-03-28

2009-02-03

Kebede, Brook (Department: 2894)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C438S257000, C438S258000, C257SE21680, C257SE21690

Reexamination Certificate

active

07485917

ABSTRACT:
A split gate flash memory cell comprising a semiconductor substrate having a first insulating layer thereon and a floating gate with a first width is disclosed. The cell further comprises a second insulating layer, a control gate and a cap on the floating gate in sequence. The cap layer, the control gate and the second insulating layer have a same second width less than the first width. The cell also comprises a third insulating layer over the semiconductor substrate, the sidewalls of the control gate, the second insulating layer, the floating gate, and the first insulating layer. In addition, an erase gate formed on the third insulating layer is provided.

REFERENCES:
patent: 6101131 (2000-08-01), Chang
patent: 2003/0227047 (2003-12-01), Hsu et al.
patent: 2004/0201060 (2004-10-01), Rudeck et al.
patent: 2006/0019445 (2006-01-01), Chen

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