Split cavity wall plating for an integrated circuit package

Details Split cavity wall plating for an integrated circuit package Split cavity wall plating for an integrated circuit package

1998-09-15

2000-11-28

Cuchlinski, Jr., William A.

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

257675, 257680, 257708, 257712, 361761, 361764, 361777, H02G 308, H05K 500

Patent

active

061538299

ABSTRACT:
An electronic package that may include a first bond pad and a second bond pad located on a bond shelf. The bond shelf may have an edge. The package may have a first conductive bus that may be connected to the first bond pad by a first conductive strip that extends along the edge of the bond shelf. The package may also have a second conductive bus that may be connected to the second bond pad by a second conductive strip that extends along the edge of the bond shelf.

REFERENCES:
patent: 5491362 (1996-02-01), Hamzehdoost et al.
patent: 5557502 (1996-09-01), Banerjee et al.
patent: 5877553 (1999-03-01), Nakayama et al.
patent: 6008532 (1999-12-01), Carichner

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