SPI addressing beyond 24-bits

Details SPI addressing beyond 24-bits SPI addressing beyond 24-bits

2008-11-25

2010-12-07

Kindred, Alford W (Department: 2181)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output addressing

C710S004000, C710S005000

Reexamination Certificate

active

07849229

ABSTRACT:
A system and/or methodology that facilitates serial peripheral interface (SPI) addressing beyond 24 bits, by portioning a conventional SPI command byte into a plurality of nibbles. A new set of commands are mapped to the first nibble, and selected from the set of unused binary values under the conventional SPI command protocol. A number of address bytes required to access the storage location for the command are mapped on a second nibble, and a user and/or system definable number of dummy bytes to be sent after the command are mapped on a third nibble.

REFERENCES:
patent: 7281082 (2007-10-01), Knapp
patent: 2008/0091848 (2008-04-01), Kuo et al.
patent: 2008/0114960 (2008-05-01), Huang et al.

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