Speed power efficient USB method

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing

Reexamination Certificate

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Details

C710S008000, C710S014000, C710S015000, C710S016000, C710S018000

Reexamination Certificate

active

06839778

ABSTRACT:
An apparatus comprising a peripheral device and a host device. The peripheral device may be connected to the host device. The speed of the peripheral device may be adjusted in response to one or more predetermined conditions.

REFERENCES:
patent: 3950735 (1976-04-01), Patel
patent: 4007449 (1977-02-01), Vercesi
patent: 5230071 (1993-07-01), Newman
patent: 5579531 (1996-11-01), Sugita
patent: 5922056 (1999-07-01), Amell et al.
patent: 6131134 (2000-10-01), Huang et al.
patent: 6311245 (2001-10-01), Klein
patent: 6311287 (2001-10-01), Dischler et al.
Universal Serial Bus Specification, Revision 2.0, Apr. 27, 2000, pp. 1-622.
Universal Serial Bus Specification, Revision 1.1, Sep. 23, 1998, pp. 1-311.

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