Electrical computers and digital processing systems: processing – Processing control – Processing sequence control
Patent
1998-04-07
2000-05-23
Ellis, Richard L.
Electrical computers and digital processing systems: processing
Processing control
Processing sequence control
712229, 708652, G06F 922, G06F 9302
Patent
active
060676175
ABSTRACT:
A computer system having a pipelined computer processor, which executes a relatively simple instruction set in a hardware controlled execution unit and executes a relatively complex instruction set in a milli-mode architected state with a millicode sequence of simple instructions in said hardware controlled execution unit, a millicode operating in a milli-mode state when macro-mode decoding by said processor is suspended to cause the system to subsequently use processor milli-registers and the processor's decoder decodes them and schedules them for execution upon entry into the processor milli-mode. Millicode flags allow specialized update and branch instructions and flags are either cleared or specifically set for a millicode instruction. A millicode instruction for editing functions processes one byte of an input pattern string, generates one byte of an output string, and updates various pointers and state indications to prepare for processing the next byte in a string. Translate Fetch (TRFET) millicode instructions support a Translate and Test TRT instruction and specialized millicode instructions for packed decimal division make use of the hardware control and dataflow logic designed to support simpler packed decimal operations including Add to provide operand access, checking, preparation, and storing functions, and to generate the quotient digits as needed for the DP instruction are implemented as as internal code instructions, rather than implementing the entire DP function in hardware, and control is maintained in internal code allowing simpler handling of unusual and boundary conditions.
REFERENCES:
patent: 4384341 (1983-05-01), Tague et al.
patent: 5226164 (1993-07-01), Nadas et al.
patent: 5280593 (1994-01-01), Bullions, III et al.
patent: 5345567 (1994-09-01), Hayden et al.
patent: 5694587 (1997-12-01), Webb et al.
patent: 5694617 (1997-12-01), Webb et al.
patent: 5748951 (1998-05-01), Webb et al.
patent: 5754810 (1998-05-01), Webb et al.
patent: 5802359 (1998-09-01), Webb et al.
"A High-Frequency Custom CMOS S/390 Microprocessor" by C. F. Webb & J. S. Liptay, International Conference on Computer Design Oct. 12-15, 1997, pp. 241-246.
"Milli-Code" by R. J. Bullions et al., INBM Technical Disclosure Bulletin, vol. 35, No. 4A, Sep. 1992, pp. 451-454.
Li Wen He
Webb Charles Franklin
Augspurger Lynn L.
Ellis Richard L.
International Business Machines - Corporation
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