Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2004-07-22
2009-12-15
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07634748
ABSTRACT:
A method for correcting a plurality of violations in a circuit design and new cells used in the method are disclosed. The method generally includes the steps of (A) implementing a first engineering change order in the circuit design to correct a first of the violations, (B) implementing a second engineering change order with a special cell to correct a second of the violations, the special cell having a plurality of interfaces available for a signal path associated with the second violation, each of the interfaces having a characteristic appropriate to correct the second violation, each of the characteristics having a different performance and (C) routing the signal path to one of the interfaces to fix the second violation.
REFERENCES:
patent: 6184711 (2001-02-01), Graef et al.
patent: 2002/0162086 (2002-10-01), Morgan
patent: 2004/0199879 (2004-10-01), Bradfield et al.
patent: 2006/0031796 (2006-02-01), Meaney
Dinter Matthias
Dirks Juergen
Leyrer Johann
Kik Phallaka
LSI Corporation
Maiorana PC Christopher P.
Memula Suresh
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