Computer graphics processing and selective visual display system – Computer graphics display memory system – Addressing
Reexamination Certificate
2005-05-03
2005-05-03
Tung, Kee M. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Addressing
C345S545000, C711S202000, C711S206000
Reexamination Certificate
active
06888551
ABSTRACT:
A method, apparatus, and signal-bearing medium for sending to a display device only those regions of the display screen that change. A frame buffer is divided into tiles, which may be composed of one or more regions, and data in the frame buffer represents pixels on the display screen. When data representing a pixel is modified in the frame buffer, the region or tile associated with the pixel is marked as dirty, and those tiles or regions that are dirty in the frame buffer are written to the display.
REFERENCES:
patent: 4958378 (1990-09-01), Bell
patent: 5276851 (1994-01-01), Thacker et al.
patent: 5835082 (1998-11-01), Perego
patent: 6247084 (2001-06-01), Apostol et al.
patent: 20020085013 (2002-07-01), Lippincott
Fairchild Semiconductor, DM74LS74A, Dual Positive Edge D Flip Flops with Complementary Output, Aug., 1986 (Rev. Mar. 2000), www.fairchildsemi.com.
Midford Steven L.
Willis Thomas E.
Schwegman Lundberg Woessner & Kluth P.A.
Tung Kee M.
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