Spare input/output buffer

Details Spare input/output buffer Spare input/output buffer

2006-05-30

2006-05-30

Beausoliel, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S006130, C714S030000, C714S042000, C326S016000

Reexamination Certificate

active

07055069

ABSTRACT:
An integrated circuit (“IC”) package includes an input/output (“I/O”), a spare I/O circuit, and a resident IC for processing data. The I/O circuit is coupled with a plurality of external pins, which provide external electrical connections for the communication of data and information between the resident circuitry and external circuits, such as system logic and other electronic devices to which the IC package is coupled. The I/O circuit provides a data path between the I/O pins and the resident IC. The I/O circuit may include a data buffer and voltage and current surge protection to the IC package. The resident IC includes the primary IC electronic components, such as latches, gates, and processors, configured to process the data. The spare I/O circuit provides a redundant connection between the resident IC and the external circuits. The spare I/O circuit may be provided integral to the IC package and is configured to couple a selected data I/O of the resident IC with the NC pin, and thereby bypass the I/O path provided by the I/O circuit. The spare I/O buffer may be programmed to select the I/O of the resident IC to be bypassed to the NC pin. Where the IC package includes multiple NC pins, the spare I/O buffer may provide redundant I/O path to each NC pin provided with the IC package.

REFERENCES:
patent: 4586170 (1986-04-01), O'Toole et al.
patent: 5079455 (1992-01-01), McCafferty et al.
patent: 5087953 (1992-02-01), Whittaker et al.
patent: 5299160 (1994-03-01), Mori
patent: 5448572 (1995-09-01), Knox et al.
patent: 5548555 (1996-08-01), Lee et al.
patent: 5841784 (1998-11-01), Chan et al.
patent: 5987623 (1999-11-01), Ushida
patent: 6323704 (2001-11-01), Pelley et al.
patent: 6396300 (2002-05-01), Loughmiller et al.
patent: 6405335 (2002-06-01), Whetsel
patent: 6407588 (2002-06-01), Baker
patent: 6408410 (2002-06-01), Needham
patent: 6411150 (2002-06-01), Williams
patent: 6411160 (2002-06-01), Riho et al.
patent: 6411253 (2002-06-01), Cox et al.
patent: 6411543 (2002-06-01), Narui et al.
patent: 6411647 (2002-06-01), Chan
patent: 6509632 (2003-01-01), Corisis
patent: 6813748 (2004-11-01), Isom et al.
patent: 2002/0012263 (2002-01-01), Ohshima et al.
patent: 0 670 548 (1995-09-01), None
Microsoft Dictionary 4th ed., Microsoft Press, 1999, pp115 term “CPU”.

Affiliated with

Also associated with

Rating

Spare input/output buffer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Spare input/output buffer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Spare input/output buffer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3529058