Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1997-04-14
1998-11-17
Nguyen, Viet Q.
Static information storage and retrieval
Read/write circuit
Bad bit
365 96, 365226, G11C 700
Patent
active
058386211
ABSTRACT:
A spare decoder circuit generates a redundancy signal which accesses a redundancy cell on behalf of a failed cell when an input address for repairing the failed cell accesses the failed cell in a memory device having a redundancy cell. The spare decoder circuit includes: a first programming part which includes a first signal line for generating a redundancy signal; first enabling means for providing a constant electric potential to the first signal line; and first programming cells which are connected to an address line and control an electric potential of the first signal line; and a second programming part which includes: a second signal line for generating a redundancy signal; second enabling means for providing a constant electric potential to the second signal line; and second programming cells which are connected to an address line, and controls an electric potential of the second signal line.
REFERENCES:
patent: 4701884 (1987-10-01), Aoki et al.
patent: 4734889 (1988-03-01), Mashiko et al.
patent: 5282165 (1994-01-01), Miyake et al.
patent: 5471427 (1995-11-01), Murakami et al.
patent: 5479371 (1995-12-01), Ootani
patent: 5574729 (1996-11-01), Kinoshita et al.
patent: 5652725 (1997-07-01), Suma et al.
LG Semicon Co. Ltd.
Nguyen Viet Q.
LandOfFree
Spare decoder circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Spare decoder circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Spare decoder circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-891534