Spacer integration scheme in MRAM technology

Details Spacer integration scheme in MRAM technology Spacer integration scheme in MRAM technology

2006-01-10

2006-01-10

Nelms, David (Department: 2818)

Static information storage and retrieval

Systems using particular element

Magnetic thin film

C365S174000, C365S182000, C365S208000, C365S209000, C365S212000, C257S295000, C257S296000, C257S421000, C257S422000

Reexamination Certificate

active

06985384

ABSTRACT:
A magneto resistive memory device is fabricated by etching a blanket metal stack comprised of a buffer layer, pinned magnetic layer, a tunnel barrier layer and a free magnetic layer. The problem of junction shorting from resputtered metal during the etching process is eliminated by formation of a protective spacer covering the side of the freelayer and tunnel barrier interface. The spacer is formed following the first etch through the free layer which stops on the barrier layer. After spacer formation a second etch is made to isolate the device. The patterning of the device tunnel junction is made using a disposable mandrel method that enables a self-aligned contact to be made following the completion of the device patterning process.

REFERENCES:
patent: 5640343 (1997-06-01), Gallagher et al.
patent: 5650958 (1997-07-01), Gallagher et al.
patent: 5734605 (1998-03-01), Zhu et al.
patent: 5804458 (1998-09-01), Tehrani et al.
patent: 5828598 (1998-10-01), Chen et al.
patent: 5838608 (1998-11-01), Zhu et al.
patent: 6034887 (2000-03-01), Gupta et al.
patent: 6097625 (2000-08-01), Scheuerlein
patent: 6174737 (2001-01-01), Durlam et al.
patent: 6252796 (2001-06-01), Lenssen et al.
patent: 6358756 (2002-03-01), Sandhu et al.
patent: 6365419 (2002-04-01), Durlam et al.
patent: 6385082 (2002-05-01), Abraham et al.
patent: 6538919 (2003-03-01), Abraham et al.
patent: 6590806 (2003-07-01), Bhattacharyya
patent: 6680500 (2004-01-01), Low et al.
patent: 1248305 (2002-10-01), None
patent: P2000-195251 (2000-07-01), None

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