Spacer barrier structure to prevent spacer voids and method...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S315000, C257SE21620, C257SE21633, C438S303000, C438S305000

Reexamination Certificate

active

07411245

ABSTRACT:
A semiconductor device includes a spacer adjacent a gate structure. A protection layer covers oxide portions of the spacer surface such that subsequent manufacturing operations such as wet oxide etches and strips, do not produce voids in the spacers. A method for forming the semiconductor device provides forming a gate structure with adjacent spacers including an oxide liner beneath a nitride section, then forming the protection layer over the structure, and removing portions of the protection layer but leaving other portions of the protection layer intact to cover and protect underlying oxide portions of the spacer during subsequent processing such as the formation and removal of a resist protect oxide (RPO) layer. The protection layer is advantageously formed of a nitride film and an oxide film and produces a double spacer effect when partially removed such that only vertical sections remain.

REFERENCES:
patent: 5069747 (1991-12-01), Cathey et al.
patent: 6232640 (2001-05-01), Okada et al.
patent: 6346449 (2002-02-01), Chang et al.
patent: 6436792 (2002-08-01), Yamaguchi et al.
patent: 6512266 (2003-01-01), Deshpande et al.
patent: 2005/0112834 (2005-05-01), Jin et al.

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