Source lines for NAND memory devices

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE21680, C257SE21690

Reexamination Certificate

active

11209487

ABSTRACT:
A NAND memory device has a source line connected to two or more columns of serially-connected floating-gate transistors. The source line includes a first conductive layer formed on a substrate and coupled to source select gates associated with the two or more columns of serially-connected floating-gate transistors. The source line also includes a second conductive layer formed on the first conductive layer, where the second layer has a greater electrical conductivity than the first conductive layer.

REFERENCES:
patent: 6515329 (2003-02-01), Lee
patent: 6762093 (2004-07-01), Rudeck
patent: 7115509 (2006-10-01), Chen et al.
patent: 2003/0080374 (2003-05-01), Arai

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