Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate
2007-12-04
2007-12-04
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having schottky gate
C438S106000, C438S107000, C438S108000, C438S109000, C438S110000, C438S112000, C438S113000, C438S121000, C438S124000, C438S125000, C438S126000, C257SE21508
Reexamination Certificate
active
11180471
ABSTRACT:
A FET includes elongated, mutually parallel source regions separated by gate and drain regions. Conductive bridges extend over the gate and drain regions and not in electrical contact therewith to electrically and thermally interconnect the sources. A layer of dielectric is applied over surfaces, and an aperture is defined over the bridges. A thick layer of metal is applied over and in thermal and electrical contact with the bridges. Electrical and thermal connections can be made to the thick metal.
REFERENCES:
patent: 5353498 (1994-10-01), Fillion et al.
patent: 6306680 (2001-10-01), Fillion et al.
Bronecke Peter N.
Fillion Raymond Albert
Meyer Laura Jean
Tucker Jesse Berkley
Wright Joshua Isaac
Duane Morris LLP
Lebentritt Michael
Lee Kyoung
Lockheed Martin Corporation
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