Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-12-20
2010-02-09
Lee, Hsien-ming (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S672000, C438S675000, C438S700000, C257SE21575, C257SE21577, C257SE21585
Reexamination Certificate
active
07659196
ABSTRACT:
Described herein are embodiments of a method that includes forming a hard mask over an interlayer dielectric layer, patterning said hard mask, etching said interlayer dielectric layer, and removing said hard mask during a post-etch clean with a wet etchant having a selectivity to etch said hard mask at a greater rate than said interlayer dielectric layer.
REFERENCES:
patent: 5670423 (1997-09-01), Yoo
patent: 6350682 (2002-02-01), Liao
patent: 6924228 (2005-08-01), Kim et al.
patent: 6984529 (2006-01-01), Stojakovic et al.
patent: 7132369 (2006-11-01), Delgadino et al.
patent: 7176126 (2007-02-01), Oh et al.
patent: 7241681 (2007-07-01), Kumar et al.
patent: 2006/0286794 (2006-12-01), Lin et al.
patent: 2007/0254476 (2007-11-01), Chou et al.
patent: 2008/0079155 (2008-04-01), Mule et al.
Abdelrahman Magdy S.
Hussein Makarem A.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Lee Hsien-ming
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