Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
2001-06-29
2003-02-18
Ho, Hoai (Department: 2818)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
C365S105000, C365S173000, C365S175000
Reexamination Certificate
active
06522573
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-200261, filed Jun. 30, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solid-state magnetic memory using ferromagnetic tunnel junctions and diodes.
2. Description of the Related Art
Magnetoresistance effect elements using magnetic films have been used for magnetic heads and magnetic sensors. Use of magnetoresistance effect elements as magnetic recording elements (or magnetoresistance effect memory) has also been proposed.
In recent years, a magnetoresistance effect element, or a so-called ferromagnetic tunnel junction element, has been discovered. The magnetoresistance effect element utilizes a sandwich film where a dielectric layer is inserted between two ferromagnetic layers and makes use of tunnel current flowing when a voltage is applied vertically to the film surface. With a ferromagnetic tunnel junction element (TMR element), a magnetic resistance change rate of 20% or more has been realized (J. Appl. Phys. 79, 4724 (1996)). Such a high magnetic resistance change rate was achieved by forming a thin Al layer of a thickness of 0.7 nm to 2.0 nm on a ferromagnetic electrode and then exposing its surface to oxygen glow discharge or oxygen gas to form a tunnel barrier layer made of Al
2
O
3
. This has increased the possibility that TMR elements will be applied to magnetic sensors or ferromagnetic resistance effect memory.
A ferromagnetic single tunnel junction element having a structure where an antiferromagnetic layer is provided in contact with a three-layer film of ferromagnetic layer/tunnel barrier layer/ferromagnetic layer, one ferromagnetic layer being a magnetization fixed layer, has been proposed as a typical ferromagnetic tunnel junction element (Jpn. Pat. Appln. KOKAI Publication No. 10-4227).
Furthermore, a ferromagnetic tunnel junction element where magnetic particles are distributed in a dielectric and a ferromagnetic double tunnel junction element having a structure of ferromagnetic layer/tunnel barrier layer/ferromagnetic layer/tunnel barrier layer/ferromagnetic layer (each ferromagnetic layer being continuous) have been proposed (Phys. Rev. B56 (10), R5747 (1997); Applied Magnetics Society Journal 23, 4-2, (1999); Appl. Phys. Lett., 73 (19), 2829 (1998)). Even those ferromagnetic tunnel junction elements can achieve a magnetic resistance change rate of 20% or more. Moreover, even when the applied voltage is raised to obtain the desired signal voltage, a decrease in the magnetic resistance change rate can be suppressed. As a result, the possibility that ferromagnetic tunnel junction elements will be applied to magnetic sensors or magnetic resistance effect memories is becoming stronger.
Several architectures of solid-state magnetic memory (or magnetoresistance random access memory: MRAM) using those ferromagnetic tunnel junctions have been proposed.
One of them is the architecture (CMOS+TMR architecture) that combines CMOS transistors with TMR elements as in DRAMs and uses a transistor to select the desired TMR element (U.S. Pat. No. 5,734,605). with this architecture, there is a possibility that a nonvolatile MRAM whose read and write time is as fast as 30 nanoseconds or less and which can be rewritten as many as 10
15
times or more will be realized. In a case where ferromagnetic double tunnel junction elements are used in the CMOS+TMR architecture, a decrease in the magnetic resistance change rate can be suppressed even when the applied voltage is raised to obtain the desired signal voltage, producing a great signal voltage, which presents a favorable characteristic as a solid-state magnetic memory. In the CMOS+TMR architecture, however, the cell size is determined by the size of the CMOS transistor. For this reason, in the CMOS+TMR architecture, it is difficult to realize a large-capacity MRAM exceeding the capacity of a DRAM.
Furthermore, as in the FeRAM, the architecture has been proposed which constructs a memory cell of two transistors and two ferromagnetic tunnel junction elements, does writing in such a manner that the magnetization of one ferromagnetic tunnel junction element is always in reverse parallel with the magnetization of the other ferromagnetic tunnel junction element, and does reading by differential sensing (ISSCC 2000 International Meeting, February, 2000). Use of this architecture makes it unnecessary to use reference cells because reading is done by differential sensing, which makes the signal voltage as high as twice or more that of the CMOS+TMR architecture. Since in this architecture, a memory cell is composed of two transistors and two TMRs, the cell size becomes larger, which makes it impossible to realize a large-capacity MRAM.
To solve the problem of restrictions on the capacity caused by the use of the aforementioned transistors, a structure that connects diodes and ferromagnetic tunnel junction elements in series has been proposed (Proceedings of Int'l. Nonvolatile Memory Technology Conference, p.47, 1998; IEEE Trans. Mag., 35, 2832 (1999)). Since in these architectures, an a-Si diode is formed on metal wires, the formation of a large-capacity MRAM might cause a leak path in the diode, resulting in a stronger possibility that the yield of memory will be decreased seriously.
As described above, in the architecture that combines transistors with TMR elements, since the cell size is determined by the size of the transistor, the disadvantage is that it is difficult to realize a large-capacity MRAM. On the other hand, the architecture that connects diodes and ferromagnetic tunnel junctions in series has a disadvantage in that a leak path develops in an a-Si diode formed on metal wires and therefore there is a stronger possibility that the yield of memory will be decreased seriously.
BRIEF SUMMARY OF THE INVENTION
An object of the present invention is to provide a solid-state magnetic memory which enables a higher capacity, assure a high reliability, and has a high yield.
According to a first aspect of the present invention, there is provided a solid-state magnetic memory comprising a semiconductor substrate, ferromagnetic tunnel junction elements arrayed in a row direction and a column direction crossing the row direction and each comprising a magnetic recording layer, a magnetization direction of which is reversed by applying first and second magnetic fields thereto and changing a direction of the second magnetic field, a magnetization fixed layer facing the magnetic recording layer and configured to retains a magnetization direction thereof unchanged on applying the first and second magnetic fields, and a nonmagnetic layer intervening between the magnetic recording layer and the magnetization fixed layer, first wirings each extending in the column direction and arranged in the row direction, a unit consisting of one of the first wirings and one of first element groups being repeated in the row direction, each of the first element groups comprising part of the ferromagnetic tunnel junction elements arranged in the column direction, and the first wirings being configured to generate the first magnetic field by causing currents to flow in the same direction through two of the first wirings adjacent to each other, second wirings positioned apart from the first wirings, each extending in the row direction and arranged in the column direction, the second wirings facing second element groups respectively, each of the second element groups comprising part of the ferromagnetic tunnel junction elements arranged in the row direction, and the second wirings being configured to generate the second magnetic field by causing a current to flow through one of the second wirings, and diodes each formed in a surface region of the semiconductor substrate at least partially, each of the second wirings being electrically connected to one of the first wiri
Amano Minoru
Nakajima Kentaro
Saito Yoshiaki
Ho Hoai
Kabushiki Kaisha Toshiba
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