Solid-state image-pickup device and MOS transistor having a redu

Details Solid-state image-pickup device and MOS transistor having a redu Solid-state image-pickup device and MOS transistor having a redu

1997-03-06

2000-08-29

Munson, Gene M.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257386, 257403, H01L 31113, H01L 2978

Patent

active

06111281&

ABSTRACT:
The invention is directed to reducing incidental capacitance associated with a MOS transistor, especially such a transistor as used with a solid-state image-pickup device, without reducing the channel conductance of the MOS transistor. To such end, N.sup.+ -type high-concentration fields are formed near the surface of a P-type well field that in a semiconductor substrate. An N-type low-concentration field is formed between and surrounding the N.sup.+ -type high-concentration fields. A depletion layer is formed by making PN junctions between N.sup.+ -type high-concentration fields and the well field in a reverse-bias state to deplete the perimeter of the N.sup.+ -type high-concentration fields and the entire N-type low-concentration field.

REFERENCES:
patent: 3814992 (1974-06-01), Kump et al.
patent: 4268845 (1981-05-01), Koike et al.
patent: 4584608 (1986-04-01), Soneda et al.
patent: 4841346 (1989-06-01), Noguichi
patent: 4990974 (1991-02-01), Vinal
patent: 5369295 (1994-11-01), Vinal

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