Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
1999-03-19
2004-02-10
Garber, Wendy R. (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C257S215000
Reexamination Certificate
active
06690423
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates a solid-state image pickup apparatus, and more particularly to a solid-state image pickup apparatus which is capable of preventing reduction in dynamic ranges of signals, thermal noise, image-lags and the like and enabling a high-quality reproduced image to be obtained.
A MOS solid-state image pickup apparatus (a MOS image sensor) has attracted attention in recent years because of its advantages that the size can be reduce and only a single power source is required to operate the MOS solid-state image pickup apparatus. Moreover, all elements including the image pickup section or peripheral circuits can be manufactured by MOS processes so that a chip is formed as one integrated circuit.
A variety of techniques have been suggested about the amplifier-type MOS solid-state image pickup apparatus (an amplifier-type MOS image sensor) having pixels each including an amplifying function. The foregoing amplifier-type MOS sensor has been expected to enable the number of pixels to be enlarged to improve the image quality and the size of each pixel to be reduced to reduce the image size.
As compared with the CCD image sensor, the amplifier-type MOS image sensor requires only small power consumption and permits unification with other peripheral circuits which are formed by the same CMOS process as the sensor section. Therefore, an advantage can be realized in that cost reduction is permitted.
FIG. 1
is a diagram showing a part of a cross sectional structure of a unit pixel disposed two-dimensionally in an image pickup region of the solid-state image pickup apparatus called an amplifier-type MOS image sensor.
Referring to
FIG. 1
, a p-type (although p-type is shown in the drawing, N-type is permitted) well region
4
is formed on a p-type silicon substrate
2
. A light receiving region
10
composed of a p
+
diffusion layer
6
which is provided on the surface of the light receiving substrate and an n-type diffusion layer
8
which serves as a signal accumulating section, a signal detecting section
12
and an amplifying transistor
18
having a drain
14
and a source
16
are formed on the surface of the well region
4
.
A gate electrode
20
of a reading MOS field effect transistor (hereinafter abbreviated as “reading MOS transistor”) is, on the well region
4
, disposed between the light receiving region
10
and the signal detecting section
12
. An electric wire
24
is connected to the signal detecting section
12
and a gate electrode
22
of the amplifying transistor
18
to establishing the connection between the signal detecting section
12
and the gate electrode
22
. Moreover, a signal reading line
26
is connected to a source
16
of the amplifying transistor
18
.
The operation of the image pickup element having the above-mentioned pixel structure is as follows.
Light beams made incident on the light receiving region
10
in the photoelectric conversion region during a signal accumulating period generates signal charges. The signal charges are accumulated in the signal accumulating section (the n-type diffusion layer)
8
. After the signal accumulating period has been completed, the reading MOS transistor is turned on so that the signal charge is discharged from the signal accumulating section
8
to the signal detecting section
12
through the channel of the MOS transistor. In the signal detecting section
12
, the signal charge is converted into a signal voltage. The charge of the signal voltage is introduced into the gate electrode
22
of the amplifying transistor through the wire
24
. The signal charge is read from the signal reading line
26
connected to the source
16
of the amplifying transistor.
FIGS. 2A and 2B
are diagrams showing a state in which a signal charge is read when the signal charge is discharged from the signal accumulating section
8
to the signal detecting section
12
.
When the reading gate has been turned on, the potential of the MOS channel is raised. Thus, the signal charge accumulated in the signal accumulating section
8
is read through the channel of the MOS transistor as indicated with an arrow A shown in FIG.
2
A.
However, the above-mentioned conventional pixel structure suffers from the following problems.
That is, when a signal charge is read, the potential of the channel of the MOS transistor is raised. Therefore, the potential of an end of the signal accumulating section adjacent to the reading gate is modulated so that the signal charge is read from the signal accumulating section. However, if a p
+
layer for preventing a dark current exists, the potential of the end of the signal accumulating section adjacent to the reading gate, cannot easily be modulated with the gate potential because the potential of the p
+
layer is fixed to a reference potential. Therefore, a potential barrier for the signal charge is formed, as shown in FIG.
2
B. As a result, reading of a signal indicated with the arrow A cannot completely be performed.
If reading of a signal from the signal accumulating section
8
cannot completely be performed, the reproduced image encounters problems in that the dynamic range of the element is reduced, thermal noise increases in a dark state and an image-lag is formed. Therefore, there arises a problem in that the quality of the reproduced image excessively deteriorates. Moreover, the above-mentioned problem becomes furthermore critical as the pixel size is reduced.
To meet requirement for improving the quality of a reproduced image or reducing the element size, the size of each unit pixel has been reduced from year to year. Although the size of the MOS transistor is reduced as the size of the unit pixel is reduced, the foregoing reduction in the element size usually causes reduction in the applied voltage and rise in the concentration of impurities in the well to occur in accordance with a rule of scale down.
However, if the scale down is performed, the region, the potential of which can be modulated by the MOS gate is narrowed and limited to only a shallow part adjacent to the gate. Therefore, modulation of the potential of the end of the signal accumulating section adjacent to the reading gate formed deeper than the p
+
layer in the surface of the substrate cannot easily be performed. As a result, the foregoing potential barrier is easily formed in the fined pixel. Therefore, the above-mentioned problems peculiar to the amplifier-type MOS sensor becomes furthermore critical.
BRIEF SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to provide a solid-state image pickup apparatus which permits signal charges to easily be read from a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise and an image-lag even if the voltage which is applied to a reading gate is lowered owning to size reduction of the pixels of the amplification-type MOS image sensor and concentration in the well in a channel section of the reading MOS transistor is raised.
To achieve the above-mentioned object, according to a first object of the present invention, there is provided a solid-state image pickup apparatus which incorporates a semiconductor substrate having an image pickup region including unit pixels disposed in a two-dimensional configuration and signal scanning sections for reading signals from the pixels in the image pickup region, comprising:
a photoelectric conversion region having a first-conduction-type signal accumulating section formed at a position apart from the interface of the semiconductor substrate in a direction of the depth of the semi-conductor substrate for a predetermined distance and arranged to accumulate signal charges obtained from photoelectric conversion; and
a gate electrode of a first-conduction-type MOS field effect transistor formed adjacent to the photoelectric conversion region and arranged to discharge a signal charge from the signal accumulating section, wherein
at least a part of the signal accumulating section in a direction of a channel
Abe Seigo
Hori Masako
Ihara Hisanori
Inokuma Hideki
Inoue Ikuko
Garber Wendy R.
Tillery Rashawn N.
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