Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-05-15
2003-11-04
Munson, Gene M. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S347000, C257S435000, C438S510000
Reexamination Certificate
active
06642561
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solid imaging device, a method for manufacturing the same and more particularly to a MOS solid imaging device.
2. Description of the Related Art
A two-dimensional solid imaging device (A two-dimensional solid state image pickup device), which comprises a matrix of pixels that each comprise a photoelectric conversion element such as a photodiode and a means that extracts the photoelectric charge generated by the photoelectric conversion element to output signal lines, is used in various applications. Such solid imaging devices may be roughly divided into CCD-type and MOS-type devices depending on the means that reads (extracts) the photoelectric charge generated by the photoelectric,conversion element. A CCD-type device transfers the photoelectric charge while accumulating it in potential wells, and has the shortcoming of a small dynamic range. On the other hand, a MOS-type device directly reads the charge accumulated in the pn junction capacitance of the photodiode through MOS transistors.
FIG. 10
shows the construction of a pixel in a conventional MOS solid imaging device. In this drawing, PD represents a photodiode, and its cathode is connected to the gate of the MOS transistor T
11
as well as to the source of the MOS transistor T
12
. The source of the MOS transistor T
11
is connected to the drain of the MOS transistor T
13
, and the source of the MOS transistor T
13
is connected to the output signal line Vout. A DC voltage VPD is impressed to the drains of the MOS transistors T
11
and T
12
, and a DC voltage VPS is impressed to the anode of the photodiode.
When light strikes the photodiode PD, photoelectric charge is generated, which is accumulated in the gate of the MOS transistor T
11
. When a pulse signal &phgr;V is supplied to the gate of the MOS transistor T
13
to turn the MOS transistor T
13
ON, an electric current proportional to the charge in the gate of the MOS transistor T
11
is drawn to the output signal line via the MOS transistors T
11
and T
13
. An output current proportional to the amount of incident light may be read out in this way. After the signal is read, the gate voltage of the MOS transistor T
11
may be initialized by turning OFF the MOS transistor T
13
and turning ON the MOS transistor T
12
.
A MOS solid imaging device having the above pixel construction is designed and manufactured using the same processes as for standard C-MOS LSI chips. Therefore it may be integrated with other processing circuits and may be handled as a one-chip integrated circuit device. In addition, by having the MOS transistor T
11
operate as a source follower MOS transistor, the signals obtained from the photodiode PD may be amplified and noise may be reduced.
However, as shown in
FIG. 10
, a minimum of three MOS transistors must be included per pixel. This limits the area of the substrate of such a solid imaging device that may comprise the photodiode, which in turn limits the ratio of the light receiving area to the imaging area. In order to increase this ratio, a CMD (Charge Modulation Device) has been proposed in which each pixel comprises one MOS phototransistor that accumulates in a MOS capacitor the charge obtained through photoelectric conversion, but it has the shortcoming that the manufacturing process for such a device is more complex than the standard C-MOS LSI manufacturing process because unlike the MOS solid imaging device shown in
FIG. 10
, MOS phototransistors must be formed.
SUMMARY OF THE INVENTION
In view of these problems, the object of the present invention is to provide a solid imaging device with a larger light receiving area to imaging area ratio than may be manufactured using the standard C-MOS LSI manufacturing process.
In order to attain the above object, the solid imaging device of the present invention comprises a substrate including a semiconductor layer, a middle layer and a support layer, multiple pixels that each have a photoelectric conversion unit that includes a diffusion layer formed on the surface of the semiconductor layer, and insulating areas that are located such that they reach from the surface of the semiconductor layer to the middle layer and work together with the middle layer to electrically separate the pixels from each other.
In this solid imaging device, the insulating areas that are formed such that they reach the middle layer and the middle layer electrically separate each pixel, and the electric charge generated by the photoelectric conversion unit of each pixel is prevented from moving to the adjacent pixels.
Furthermore, in this solid imaging device, the middle layer may be formed using an insulating material, or using a semiconductor material having the opposite polarity from the semiconductor layer. In the latter case, each pixel may be electrically separated by impressing a prescribed DC voltage to the middle layer, which is formed of a semiconductor material having the opposite polarity from the semiconductor layer.
It is also acceptable if diffusion layers having the opposite polarity from the semiconductor layer are located such that they reach from the surface of the semiconductor layer to the middle layer. A prescribed DC voltage may be supplied to the middle layer on an individual pixel basis via the diffusion layers thus formed.
The pixel may also be constructed such that it includes first through fourth diffusion layers that each have the opposite polarity from the semiconductor layer and are aligned on the surface of the semiconductor layer, as well as a first insulating film located on the semiconductor layer between the first and second diffusion layers, a second insulating film located on the semiconductor layer between the third and fourth diffusion layers, a first electrode film located on the first insulating film, and a second electrode film located on the second insulating film, wherein the photoelectric conversion unit comprises the second diffusion layer and the semiconductor layer and has a first electrode and a second electrode.
The pixel also includes a first MOS transistor comprising the first diffusion layer, the second diffusion layer, the first insulating film and the first electrode film, and a second MOS transistor comprising the third diffusion layer, the fourth diffusion layer, the second insulating film and the second electrode film. The first and second MOS transistors each have a first electrode, a second electrode and a gate electrode.
Furthermore, the pixel may also be constructed such that (i) the first electrode of the first MOS transistor is connected to the first electrode of the photoelectric conversion element, (ii) the back gate of the first MOS transistor is connected to the second electrode of the photoelectric conversion element such that the first MOS transistor outputs signals from the second electrode, and (iii) the first electrode and the back gate of the second MOS transistor are connected to the second electrode of the photoelectric conversion element such that a reset DC voltage is impressed to the second electrode of the second MOS transistor.
When light strikes the pixel in this solid imaging device, electric charge is accumulated in the second electrode of the photoelectric conversion element, and the voltage of the back gate of the first MOS transistor varies depending on the amount of incident light. When the first MOS transistor is turned ON, an electric signal corresponding to the amount of incident light is output from the second electrode of the first MOS transistor. When the second MOS transistor is turned ON, the voltages of the second electrode of the photoelectric conversion element and the back gate of the first MOS transistor are initialized based on the reset DC voltage impressed to the second electrode of the second MOS transistor.
In addition, by forming the second and third diffusion layers such that they do not reach the middle layer, the semiconductor layer on the middle layer may comprise the back gates of the first and second MOS transistors
Hagihara Yoshio
Kakumoto Tomokazu
Minolta Co. , Ltd.
Munson Gene M.
Sidley Austin Brown & Wood LLP
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