Solder terminal and fabricating method thereof

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S613000, C438S614000, C438S652000, C438S653000, C438S654000

Reexamination Certificate

active

06897141

ABSTRACT:
A solder terminal and a fabrication method thereof are provided. According to one embodiment of the present invention, a solder terminal structure includes an adhesion metal layer formed on an electrode pad of a semiconductor device, a thermal diffusion barrier, a solder bonding layer, and a solder bump formed on upper portion of the solder bonding layer. With the thermal diffusion layer, the characteristic deterioration caused by the probe mark generated on the electrode pad can be prevented during a semiconductor reliability test, and at the same time, material movement between the layers of the electrode pad, the solder bonding layer and the adhesion metal layer can be reduced. Also, by having the thermal diffusion barrier act as a solder dam (a layer to confine the melted solder area to prevent the solder from being wetted), an additional deposition or etching process can be omitted.

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Deborah S. Patterson, et al. “Wafer Bumping Technologies-13 A Comparative Analysis of Solder Deposition Processes And Assembly Considerations” pp. 1-15.
R. J. Herdzik, et al. “Barrier Layer Metallurgy for Aluminum Stripes” IBM Technical Disclosure Bulletin Vo. 10 No. 12 May 1968 (2 pages).
R.A. Leonard and M. Revitz “Chromium Barrier for Terminal Metallurgies” IBM Technical Disclosure Bulletin vol. 13, No. 5 Oct. 1970 (2 pages).
Kazuyuki Nakagawa, et al. “Thermo-Electromigration Phenomenon of Solder Bump, Leading to Fip-Chip Devices With 5,000 Bumps” IEEE Electronic Components and Technology Conference 2001 (4 pages).

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