Metal fusion bonding – Process – Specific mode of heating or applying pressure
Reexamination Certificate
2001-12-28
2003-11-11
Elve, M. Alexandra (Department: 1725)
Metal fusion bonding
Process
Specific mode of heating or applying pressure
C228S180210, C228S180220, C228S246000, C219S678000
Reexamination Certificate
active
06644536
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of semiconductor integrated circuit (IC) manufacturing, and more specifically, to a method of packaging flip chips.
2. Discussion of Related Art
Chip-to-package interconnections have traditionally involved wirebonding. Wirebonding is the use of very fine metal wires to join the contacts at the top surface of the chip with the corresponding contacts at the top surface of the substrate. However, as transistor sizes continue to shrink, chip performance and chip reliability are becoming limited by the chip-to-package interconnections. Consequently, wirebonding is being superseded by solder bumping.
Solder bumping has many advantages over wirebonding. First, bumps may be placed anywhere over the chip so the input/output (I/O) density is significantly increased. Second, the bumps reduce the length of the interconnections so chip performance is greatly enhanced. Third, eliminating the edge-connections associated with wirebonding allows a higher level of integration of the chip with the packaging, thus decreasing the footprint of the package.
As part of the process of solder bumping, a chip on a die is attached to a substrate in a package by reflowing solder in a convection oven. Reflow involves melting the solder to reach an energetically more favorable shape and state. However, all components on the die and the substrate are heated so damage may result, especially during cool down, from the large stresses that arise at interfaces between different materials. Such thermal mismatch occurs because the Coefficient of Thermal Expansion (CTE) of the substrate may be about ten times larger than the CTE of the chip. The difference in CTE with the chip is larger for organic substrates than for ceramic substrates. The large stresses may lead to delamination and cracks which tend to propagate when the chip is thermally loaded, especially under conditions of high humidity.
Thus, what is needed is a method of selectively reflowing solder without affecting other components on the substrate.
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Gonzalez Carlos
Ratificar Glenn
Wang Lejun
Chen George
Edmondson L.
Elve M. Alexandra
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