Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2002-02-15
2003-05-27
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S772000
Reexamination Certificate
active
06570260
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
Not applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH
Not applicable.
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention generally relates to solder compositions of the type used with electronic packaging, such as flip chip attachment. More particularly, this invention relates to an In—Pb—Ag—Cu solder alloy having a reflow temperature that is compatible with typical circuit board assembly processes and exhibits improved reliability over commercially-available lead-based solder alloys with comparable reflow characteristics.
(2) Description of the Related Art
Surface-mount (SM) semiconductor devices such as flip chips and ball grid arrays (BGA's) are attached to circuit boards with beadlike terminals formed on interconnect pads located on one surface of the device. The terminals are typically in the form of solder bumps near the edges of the chip, and serve to both secure the chip to the circuit board and electrically interconnect the flip chip circuitry to the metal traces of a conductor pattern on the circuit board. Due to the numerous functions typically performed by the microcircuitry of flip chips and BGA's, a relatively large number of solder bumps are required. The size of a typical flip chip is generally on the order of a few millimeters per side, resulting in the solder bumps being crowded along the edges of the chip.
Flip chip interconnect pads are electrically interconnected with the circuitry on the flip chip through vias. Because aluminum metallization is typically used in the fabrication of integrated circuits, the vias (and any required runners) are also typically formed of an aluminum or aluminum alloy, which are generally unsolderable and susceptible to corrosion if left exposed. Consequently, the interconnect pad is often formed by one or more additional metal layers deposited on the flip chip to provide an interconnect surface to which a solder bump alloy will more readily wet and metallurgically bond. These additional metal layers, referred to as under bump metallurgy (UBM), may be, for example, sputtered nickel and copper, respectively, or an evaporated multilayer structure comprising an adhesion layer of aluminum or chromium, a diffusion barrier layer of a nickel-vanadium or chromium-copper alloy, and a solderable layer of copper. In each case, copper forms the outer layer of the UBM because it is readily solderable, i.e., can be wetted by and will metallurgically bond with solder alloys of the type used for solder bumps.
Because of the narrow spacing required for the solder bumps and their traces, soldering a flip chip or other SM component to a conductor pattern requires a significant degree of precision. Reflow solder techniques are widely employed for this purpose, and entail precisely depositing a controlled quantity of solder on the interconnect pads of the chip using methods such as electrodeposition and printing. Once deposited, heating the solder above its melting or liquidus temperature (for eutectic and noneutectic alloys, respectively) serves to form the solder bumps on the pads. After cooling to solidify the solder bumps, the chip is soldered to the conductor pattern by registering the solder bumps with their respective metal traces and then reheating, or reflowing, the solder so as to form solder connections that metallurgically adhere to the traces. The highest temperature attained during a reflow process in which solder bumps are reflowed to form solder connections is referred to as the peak reflow temperature, and is conventionally about 20° C. to about 50° C. above the melting or liquidus temperature of the particular solder alloy. As would be expected, controlling the width of a solder joint is necessary to prevent shorting with adjacent connections. Controlling the height of the solder joint is also necessary to prevent the molten solder from drawing the flip chip excessively close to the circuit board during the reflow operation, when the molten solder bump tends to spread outward as a result of wetting the surfaces it contacts. The ability to control solder bump height and width is determined in part by the reflow characteristics of the solder alloy used, based on its melting point (for a eutectic alloy) or solidus and liquidus temperatures (for noneutectic alloys), and the peak reflow temperatures required by the particular circuit board assembly.
The eutectic 63Sn-37Pb solder alloy (melting point of 183° C.) is the most widely used solder alloy in the electronics industry, and for process compatibility is therefore the most commonly used solder bump alloy. A typical reflow profile using the 63Sn-37Pb alloy employs a peak reflow temperature between 220° C. to 240° C., which is acceptable for nearly all circuit components. Process compatibility is important because it allows a flip chip to be attached simultaneously with other components on a circuit board. However, flip chip attachment is complicated as a result of the solder joints of a flip chip being much smaller than those of other components, and the significant mismatch in coefficients of thermal expansion (CTE) between flip chip and circuit board materials. The combination of small solder joints and CTE mismatch promote the likelihood of open solder connections as a result of solder fatigue. While underfilling flip chips and other surface-mount devices with a suitable material significantly improves solder joint fatigue resistance, this step incurs additional cost to the final product.
Alternative solder alloys have also been investigated to improve the thermal fatigue life of flip chip solder joints. Notable alloys include 10Sn-90Pb, 5Sn-95Pb, 3Sn-97Pb, and 50In-50Pb. However, the first three of these alloys require an assembly temperature of about 350° C. as a result of their high lead contents, and therefore their use is not compatible with many circuit components. A typical maximum reflow temperature for many components is about 240° C. Though higher temperature components may be available for a particular application, their cost can be prohibitive. As a solution, flip chips have been first attached with high-temperature solder alloys, followed by the attachment of other components with the 63Sn-37Pb alloy. Alternatively, the 63Sn-37Pb has been applied to circuit boards at the flip chip sites, enabling a flip chip with high-temperature solder bumps to be reflow soldered along with the other components on the circuit board. However, each of these processes incurs additional cost and time.
The above-noted 50In-50Pb solder alloy is known to have good fatigue resistance, to the extent that underfill is not required. However, the 50In-50Pb alloy is prone to electromigration which, as known in the art, is the migration of atoms in the direction of electron flux. While the fatigue resistance of the 50In-Pb50 alloy increases with increasing indium content, resistance to electromigration has been shown to decrease. Furthermore, 50In-50Pb has a liquidus temperature of 212° C., necessitating an assembly reflow temperature of about 250° C. to 260° C. This disadvantage can be addressed by using two-step reflow process or components with higher temperature ratings as discussed above, though with the noted additional costs. Low-temperature components have been successfully attached with the 50In-50Pb alloy using reflow temperatures of about 240° C. to 250° C., however, there can be an adverse impact on product reliability, and this reflow temperature range is too low to adequately reflow 50In-50Pb solder bumps on flip chips.
In view of the above, it would be desirable if a solder bump alloy were available that exhibited improved fatigue resistance and good electromigration resistance, yet could be reflowed in the presence of other components on the same circuit board. It would be particularly desirable if such improvements could be obtained with a solder alloy requiring a peak reflow temperature between 220° C. to 240° C., allowing a flip chip to be attached with the solder while other components are s
Brandenburg Scott D.
Carter Bradley H.
Yeh Shing
Delphi Technologies Inc.
Funke Jimmy L.
Nelms David
Nhu David
LandOfFree
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