Solder interconnect techniques

Joints and connections – Molded joint – Fusion bond – e.g. – weld – etc.

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C403S272000, C228S056300, C228S141100, C228S163000

Reexamination Certificate

active

06347901

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to soldering techniques and, more particularly, to a solder method that enhances solder interconnects by eliminating solder joint failures caused by micro-cracking at or near the solder intermetallic interface.
BACKGROUND OF THE INVENTION
The fatigue life of solder interconnects is often poor, because cracks develop near an intermetallic layer. The damaging process is due to the build-up of inelastic deformation (creep) that leads to cavity nucleation, growth, and coalescence along grain boundaries. The increasing damage tends to produce micro-cracks at the boundaries. These boundary micro-cracks are disposed roughly normal to the direction of maximum tensile stress.
The factors that influence the aforementioned damage include: (a) the shape of the joint, which influences the stress concentration at the free joint boundaries; (b) the build-up of intermetallics, which are known to locally increase stress in solder at and above the intermetallic layer; and (c) the local coefficient of thermal expansion (CTE) mismatch between the pad and the solder.
It is also observed that dissolved copper, gold, or other metallic pad coating materials locally contaminate solder. The contaminants increase the solder brittleness, making the solder susceptible to micro-cracking, when compared with bulk behavior.
The present invention seeks to increase the fatigue life of the solder joint, by limiting the damage caused by micro-cracking in the solder joint. This objective is achieved by redistributing the stresses in solder, thus constraining the cracks. Such containment can be accomplished by creating obstacles along the crack path, redirecting the crack away from the intermetallic layer, or by increasing the path length along which the crack is to propagate. The solder layer can be designed to include a serpentine, interrupted, or interdigitated boundary. The method can be applied to ball grid arrays, column grid arrays, surface mount technology (SMT) joints, etc.
DISCUSSION OF THE RELATED ART
In U.S. Pat. No. 5,242,569, issued to Kang et al, on Sept. 7, 1993, for THERMOCOMPRESSION BONDING IN INTEGRATED CIRCUIT PACKAGING, a thermocompression bonding method is described that allows bonding to be achieved at lower temperatures. The process produces a soft, deformable layer of metal that is free of dendritic protrusions.
In U.S. Pat. No. 5,172,473, issued to Burns et al, on Dec. 22, 1992, for METHOD OF MAKING CONE ELECTRICAL CONTACT, a method of achieving improved electrical contact is illustrated. Contact is improved by generating cone-shaped projections upon a mating surface. The cones enhance ohmic contact by intermeshing and wiping.
In U.S. Pat. No. 5,118,299, issued to Burns et al, on Jun. 2, 1992, for CONE ELECTRICAL CONTACT, an electrical interconnection is shown featuring two detachable surfaces having intermeshing cone projections. The cones
In U.S. Pat. No. 3,881,799, issued on May 6, 1975, to Elliott et al, for RESILIENT MULTI-MICRO POINT METALLIC JUNCTION, a dynamic interfacing contact device is disclosed. The device provides multiple points of contact between opposing parallel surfaces of a pair of conductors. The points of contact are provided by a number of spaced-apart, metal protrusions.
In U.S. Pat. No. 4,751,563, issued to the common assignee, a microminiaturized electrical interconnection device is described. Electrical connection on a first pad is tangentially raised at about sixty degrees and brought into intimate contact with a second metallic layer.
SUMMARY OF THE INVENTION
In accordance with the present invention, there is provided a method and article of fabrication, featuring a solder layer that comprises a serpentine, interrupted, or interdigitated boundary. The non-planar design of the boundary layer increases the fatigue life of the solder joint, by limiting the damage caused by micro-cracking. This irregularity of the solder boundary constrains the propagation of cracks by creating obstacles along the crack path, redirecting the crack away from the intermetallic layer, or by increasing the path length along which the crack propagates.
It is an object of this invention to provide a method and article of fabrication that improves the fatigue life of solder joints.
It is another object of the invention to produce a solder joint that constrains cracking along the intermetallic boundary.


REFERENCES:
patent: 1665360 (1928-04-01), Hawley
patent: 3839727 (1974-10-01), Herdzik et al.
patent: 3881799 (1975-05-01), Elliot et al.
patent: 4032243 (1977-06-01), Keifert et al.
patent: 4605153 (1986-08-01), Van Den Brekel et al.
patent: 4705205 (1987-11-01), Allen et al.
patent: 4709849 (1987-12-01), Socolowski
patent: 4751563 (1988-06-01), Laibowitz et al.
patent: 5118299 (1992-06-01), Burns et al.
patent: 5172473 (1992-12-01), Burns et al.
patent: 5242569 (1993-09-01), Kang et al.
patent: 5381946 (1995-01-01), Koopman et al.
patent: 5842274 (1998-12-01), Modl et al.
patent: 120762 (1984-10-01), None
patent: 2047150 (1980-11-01), None
patent: 3-270235 (1991-12-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Solder interconnect techniques does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Solder interconnect techniques, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Solder interconnect techniques will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2938294

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.