Solder bump structure and method of manufacturing same

Details Solder bump structure and method of manufacturing same Solder bump structure and method of manufacturing same

2006-11-03

2010-02-09

Luu, Chuong A. (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S737000, C257S779000, C257S738000

Reexamination Certificate

active

07659632

ABSTRACT:
Solder bump structures for semiconductor device packaging is provided. In one embodiment, a semiconductor device comprises a substrate having a bond pad and a first passivation layer formed thereabove, the first passivation layer having an opening therein exposing a portion of the bond pad. A metal pad layer is formed on a portion of the bond pad, wherein the metal pad layer contacts the bond pad. A second passivation layer is formed above the metal pad layer, the second passivation layer having an opening therein exposing a portion of the metal pad layer. A patterned and etched polyimide layer is formed on a portion of the metal pad layer and a portion of the second passivation layer. A conductive layer is formed above a portion of the etched polyimide layer and a portion of the metal pad layer, wherein the conductive layer contacts the metal pad layer. A conductive bump structure is connected to the conductive layer.

REFERENCES:
patent: 6551856 (2003-04-01), Lee
patent: 2008/0122086 (2008-05-01), Tsao et al.

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