SOI substrate and process for preparing the same, and...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation

Reexamination Certificate

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C438S413000, C438S479000

Reexamination Certificate

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06528387

ABSTRACT:

TECHNICAL FIELD
This invention relates to a semiconductor substrate having a single crystalline silicon semiconductor layer formed on an insulator layer, such as a silicon on insulator (SOI) substrate or a silicon on sapphire (SOS) substrate, and a method for producing the semiconductor substrate. More specifically, the invention relates to a semiconductor substrate having a silicon layer with minimal dislocation or few defects and with satisfactory surface flatness, and a method for producing the semiconductor substrate. The invention also concerns a semiconductor device formed on the semiconductor substrate, and a method for producing the semiconductor device.
BACKGROUND ART
SOI and SOS have been known as substrate materials having a structure in which a single crystalline silicon semiconductor layer is formed on an insulator. In the present specification, semiconductor substrates (including the SOI substrate and the SOS substrate) having a single crystalline silicon semiconductor layer formed on an insulator layer are collectively called SOI substrates. These SOI substrates are applied widely to the preparation of devices, and surpass ordinary silicon substrates in the following respects:
(1) Excellency in high speed characteristics because of decreased parasitic capacitance
(2) High resistance to soft error
(3) Latch up free
(4) Omissibility of the well forming process.
To realize these advantages in device performance, the following methods for producing the SOI substrates have been available:
(i) Bonding method: A silicon single crystalline substrate is bonded to another silicon single crystalline substrate, whose surface has been thermally oxidized, by heat treatment or with the use of an adhesive, and then one of the silicon layers is converted to a uniform thin film by mechanical polishing or chemical etching.
(ii) SIMOX (separation by ion implanted oxide) method: Oxygen ions are implanted into a silicon substrate, and then this substrate is heat treated to prepare a buried SiO
2
(silicon oxide) layer in the silicon substrate.
(iii) Solid phase epitaxial growth method: The surface of a silicon substrate is oxidized, whereafter a window is opened in a part of the resulting oxide film to expose the silicon substrate, on which an amorphous silicon layer is grown. Then, heat treatment is applied to crystallize the amorphous silicon layer by lateral solid phase epitaxial growth, starting at the portion in contact with the exposed silicon.
(iv) Heteroepitaxial growth method: A single crystalline silicon layer is grown on an insulating oxide substrate, or the oxide or fluoride layer which is deposited on a silicon substrate by CVD or the like.
However, these methods have both merits and demerits, and still remain problematical in productivity and quality. With the bonding method, for example, the silicon substrate itself needs to be formed into a thin film, but it is extremely difficult to etch or polish the silicon substrate accurately and uniformly to a thickness of 1 &mgr;m or less. The SIMOX method has been studied for a long time, but has posed problems about productivity and cost, because a large amount of oxygen ions must be implanted into the silicon substrate in order to form the buried oxide film of SiO
2
in the silicon substrate. This method also involves the problems of many crystalline defects present in the silicon layer, and the presence of defects, called pipes, in the buried oxide film.
In addition, the bonded SOI substrate and the SIMOX substrate have the drawbacks that the drain breakdown voltage and the ESD (electrostatic discharge) of a device prepared thereon (e.g., a field effect transistor) are low. These are problems about quality. The drain breakdown voltage refers to a phenomenon encountered with the device being an FET (field effect transistor), the phenomenon that when the device acts as an FET, hot carriers occurring in the junction between the body and the drain accumulate in the body, abruptly increasing a drain current flowing among the drain, the body and the source, and lowering the breakdown voltage. The ESD refers to breakdown voltage at which the device is broken by an electric shock such as static electricity. According to the specifications, the value of this parameter is 2,000 V, at which devices can usually withstand the static electricity generated by a human.
As one of the SOI technique, the SOS technology is known. The SOS substrate has been used mainly for devices requiring radiation hardness in addition to the features of the SOI substrate, such as small parasitic capacitance. The SOS substrate has features that noise throughout this substrate is low, because of a thick insulating layer. With the SOS substrate, moreover, the life time of carriers at the interface between the silicon layer and sapphire is short. When the FET works, therefore, hot carriers occurring in the junction between the body and the drain immediately recombine, and minimally accumulate in the body. Hence, the current flowing among the drain, the body and the source does not increase rapidly, so that the breakdown voltage does not decrease. That is, high drain breakdown voltage is a remarkable feature of the SOS substrate. However, the SOS substrate is prepared by heteroepitaxial growth of silicon on a sapphire substrate. Differences in lattice constant and thermal expansion coefficient between the silicon layer and the sapphire substrate (&agr;-Al
2
O
3
) lead to many crystalline defects and great surface roughness, which are remaining as problems.
As an SOI substrate having an intermediate layer, such as an oxide layer or a fluoride layer, on a silicon substrate, and a single crystalline silicon layer epitaxially grown on the intermediate layer, the one having an intermediate layer of, that is, &ggr;-Al
2
O
3
is known (Japanese Patent Application Laid-open No. 1-261300 (1989)). With such an SOI substrate, it is similarly expected that the life time of carriers at the interface between the silicon layer and the intermediate layer will be short, and thus high drain breakdown voltage comparable to that of the SOS substrate will be obtained. This type of substrate also has the problems of poor crystallinity and large surface roughness of the silicon layer due to differences in lattice constant and thermal expansion coefficient.
A method known to improve the crystallinity of the silicon layer in the SOS substrate involves implanting silicon ions into the silicon layer to make the interface with the sapphire amorphous, and then annealing the layer to recrystallize it (U.S. Pat. No. 4,177,084). According to this method, the silicon layer has fewer crystalline defects and higher crystallinity than that heteroepitaxially grown on a sapphire substrate, but still has about 10
9
crystalline defects, especially stacking faults, per cm
2
remaining therein.
The silicon layer in these SOS substrates and SOI substrates also has the problem that the density of crystalline defects is higher at a site closer to the interface with the insulating substrates or the insulating layer on silicon substrate. This means that very many crystalline defects are contained in a thin silicon layer with a thickness of 0.05 to 0.3 &mgr;m, as in the case of preparation of a high speed, low electric power consumption device.
The silicon layer in these SOS substrates and SOI substrates, moreover, is poor in orientation, and may include components of a (110)-plane or a (111)-plane in a (001)-plane. In addition, the silicon layer in these SOS substrates and SOI substrates include distortion, because of a large difference between the lattice constant of the (001)-plane grown parallel to the substrate surface and the lattice constant of a (100)-plane grown perpendicular to the substrate surface.
Compared with the bonded SOI substrate or the SIMOX substrate, the SOS substrate or the SOI substrate with an intermediate layer, such as an oxide layer or fluoride layer, deposited on a silicon substrate is poor in the crystallinity and surface flatness of the silicon layer. If a semiconductor device,

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