Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With electrical contact in hole in semiconductor
Reexamination Certificate
2007-08-28
2007-08-28
Fourson, George (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With electrical contact in hole in semiconductor
C257S501000, C257S508000, C257S524000, C257S347000, C257SE27112, C257SE29020, C257SE21320, C257SE21564, C438S479000, C438S219000
Reexamination Certificate
active
11154514
ABSTRACT:
The SOI substrate1has a supporting substrate10, an insulating layer20formed on the supporting substrate10and a silicon layer30formed on the insulating layer20. A through electrode40is provided in a device formation region A1of the SOI substrate1. The through electrode40reaches the insulating layer20from the silicon layer30. Specifically, the through electrode40extends to an inner part of the insulating layer20originating from a surface of the silicon layer30while penetrating the silicon layer30. Here, an end face40aof the through electrode40at the insulating layer20side stops inside the insulating layer20.
REFERENCES:
patent: 6576957 (2003-06-01), Houston
patent: 2002/0094615 (2002-07-01), Kunikiyo
patent: 2004/0000685 (2004-01-01), Brown et al.
patent: 2003-007909 (2003-01-01), None
Kawano Masaya
Kurita Yoichiro
Tashiro Tsutomu
Fourson George
Maldonado Julio J.
NEC Electronics Corporation
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