Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1994-09-07
1998-01-13
Fourson, George
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
437 26, 437 62, H01L 2176
Patent
active
057078998
ABSTRACT:
A process for preparing an SOI structure with a deep thin oxide layer which comprises, in succession, a first ion implantation at an oxygen fluence within the range of 10.sup.15 -10.sup.16 ions/cm.sup.2, thermal treatment at a temperature within the range of 600.degree.-900.degree. C., a second ion implantation at an oxygen fluence within the range of 2.times.10.sup.17 -8.times.10.sup.17 ions/cm.sup.2, and a final thermal treatment at a temperature within the range of 1150.degree.-1400.degree. C.
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Cerofolini Gianfranco
Meda Laura
Fourson George
Istituto Guido Donegani S.p.A.
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