SOI pass-gate disturb solution

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257349, 257354, H01L 2701, H01L 2910

Patent

active

061005649

ABSTRACT:
An SOI pass-gate disturb solution for an N-type MOSFET wherein a resistor is connected between the gate and the body of the FET to eliminate the disturb condition. The FET is fabricated in a substrate having a source, a drain and a gate, wherein the body of the field effect transistor is electrically floating and the transistor is substantially electrically isolated from the substrate. A high resistance path is provided coupling the electrically floating body of the FET to the gate, such that the body discharges to a low state before significant thermal charging can occur when the gate is low, and thus prevents the accumulation of a charge on the body when the transistor is off. The resistance of the high resistance path is preferably approximately 10.sup.10 Ohms-um divided by the width of the pass-gate.

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