Soi annealing method for reducing HF defects, with lamp,...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – On insulating substrate or layer

Reexamination Certificate

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C438S308000, C438S715000, C438S459000

Reexamination Certificate

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06613638

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method of annealing an SOI (Semiconductor On Insulator) having a crystal semiconductor layer on an insulating layer and an SOI manufacturing method.
BACKGROUND OF THE INVENTION
A technique of obtaining a surface with a high planarity by annealing an SOI in a reducing atmosphere is disclosed in, e.g., Japanese Patent Laid-Open No. 05-217821 by Sato et al. According to this prior art, for example, annealing at 1,000° C. in hydrogen gas yields so high planarity that the roughness on an SOI layer surface observed with an atomic force microscope is 2 nm or less. In addition, surface planarization by hydrogen annealing has a characteristic feature that any physical damage to a surface can be prevented, unlike polishing.
Another advantage of this technique is in its high productivity that can be obtained by executing batch processing using a multi-wafer-treating annealing apparatus such as a vertical diffusion furnace generally used for a semiconductor process.
A method of annealing an SOI wafer in a reducing atmosphere is described in Japanese Patent Laid-Open No. 11-145020, where in an SOI wafer annealing method of annealing an SOI wafer at a temperature of 1,100° C. to 1,300° C. for 1 to 60 sec using a rapid heating/cooling apparatus, COP (Crystal Originated Particles) in the SOI wafer are eliminated by hydrogen annealing.
Although the number of HF defects in an SOI is decreasing in recent years, they are not completely eliminated. HF defects are supposed to cause an operation error in an SOI device, and the defect density is required to be lower. HF defects are unique to an SOI and are generated by dipping an SOI in hydrofluoric acid, as described in Sanada et al, “NANO-DEFECTS IN COMMERCIAL BONDED SOI AND SIMOX”, Proceedings 1994 IEEE International SOI Conference, October 1994.
Probable causes for HF detects are metal contamination, pinholes in an SOI layer, and COPs in an SOI layer. For HF defects based on metal contamination, only an expensive measure which requires a costly investment for plant and equipment to minimize the metal contamination has been examined. No radical measure based on examination of relationship between metal contamination and HF defects has been taken.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an SOI annealing method and SOI manufacturing method which can reduce the HF defect density in an SOI.
It is another object of the present invention to provide an SOI annealing method and SOI manufacturing method which can reduce the number of HF defects caused by metal contamination at a relatively low cost.
According to an aspect of the present invention, there is provided an SOI annealing method characterized by comprising the annealing step of annealing an SOI at a temperature between 993° C. (inclusive) and a melting point of silicon (inclusive) and the cooling step of reducing a temperature of the SOI after the annealing step, wherein in the cooling step, a cooling rate within a temperature range from 993° C. to 775° C. is not less than 0.12° C./sec.
According to another aspect of the present invention, there is provided an SOI annealing method characterized by comprising the first annealing step of annealing an SOI, the second annealing step of, after the first annealing step, annealing the SOI at a temperature between 993° C. (inclusive) and a melting point of silicon (inclusive), and the cooling step of reducing a temperature of the SOI after the second annealing step, wherein in the cooling step, a cooling rate within a temperature range from 993° C. to 775° C. is not less than 0.12° C./sec.
According to still another aspect of the present invention, there is provided an SOI annealing method characterized by comprising the annealing step of annealing an SOI at a temperature between a melting point of a semiconductor metal compound formed from a metal and a semiconductor material of a crystal semiconductor layer of the SOI (inclusive) and a melting point of the semiconductor material (inclusive), and the cooling step of reducing a temperature of the SOI after the annealing step, wherein in the cooling step, a cooling rate within a temperature range from the melting point of the semiconductor metal compound and a production temperature of the semiconductor metal compound is not less than 0.12° C./sec.
According to still another aspect of the present invention, there is provided an SOI annealing method characterized by comprising the first annealing step of annealing an SOI, the second annealing step of, after the first annealing step, annealing the SOI at a temperature between a melting point of a semiconductor metal compound formed from a metal and a semiconductor material of a crystal semiconductor layer of the SOI (inclusive) and a melting point of the semiconductor material (inclusive), and the cooling step of reducing a temperature of the SOI after the second annealing step, wherein in the cooling step, a cooling rate within a temperature range from the melting point of the semiconductor metal compound and a production temperature of the semiconductor metal compound is not less than 0.12° C./sec.
As will be described below in detail, the present inventor found that the cause of HF defects based on metal contamination was a compound of the semiconductor material of an SOI layer and a metal contaminant and that the number of formed HF defects which were formed as the compound was produced and then removed could be decreased by suppressing production of the compound.
According to the present invention, even when the crystal semiconductor layer of an SOI is contaminated by a metal, the produced semiconductor metal compound can be temporarily molten by annealing the SOI at a temperature equal to or higher than the melting point of the semiconductor metal compound formed from a metal and the semiconductor material of the crystal semiconductor layer.
In cooling the SOI from the melting point to the semiconductor metal compound production temperature, production of the semiconductor metal compound during the cooling step can be suppressed by reducing the temperature at a rate with a predetermined value or more.
Other features and advantages of the present invention will be apparent from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof.


REFERENCES:
patent: 5371037 (1994-12-01), Yonehara
patent: 5374564 (1994-12-01), Bruel
patent: 5773355 (1998-06-01), Inoue et al.
patent: 5856229 (1999-01-01), Sakaguchi et al.
patent: 5863830 (1999-01-01), Bruel et al.
patent: 5869387 (1999-02-01), Sato et al.
patent: 6171982 (2001-01-01), Sato
patent: 6238990 (2001-05-01), Aga et al.
patent: 0 926 707 (1999-06-01), None
patent: 0 926 713 (1999-06-01), None
patent: 5-217821 (1993-08-01), None
patent: 7-302889 (1995-11-01), None
patent: 2608351 (1997-05-01), None
patent: 11-145020 (1999-05-01), None
patent: 2000-91233 (2000-03-01), None
D.K. Sadana et al., “Nano-Defects in Commercial Bonded SOI and SIMOX,”Proceedings 1994 IEEE International SOI Conference, pp. 111-112 (1994).

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