Software-to-hardware compiler with symbol set inference...

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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C717S151000

Reexamination Certificate

active

07343594

ABSTRACT:
A software-to-hardware compiler is provided that generates hardware constructs in programmable logic resources. The programmable logic resources may be optimized in terms of being configured to make additional copies of regions on memory devices other than on the programmable logic resources (e.g., RAM). This facilitates multiple reads during a single clock cycle. Symbol set analysis is used to minimize the size of regions to allow for more efficient use of hardware resources.

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