Software programmable timing architecture

Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis

Reexamination Certificate

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Details

C714S728000, C714S738000, C713S502000

Reexamination Certificate

active

08006114

ABSTRACT:
An apparatus for generating a digital signal pattern may comprises a memory, a program sequencer, first and second circuits, and an event execution unit. The memory may have stored therein a plurality of instructions that, when executed, cause a digital signal pattern to be generated on a plurality of nodes. The program sequencer may be configured to control a sequence in which the plurality of instructions are retrieved from the memory and executed. The first circuit may sequentially step through a plurality of different output states in response to a clock signal. The second circuit may identify an output event when an output state of the first circuit corresponds to an output state identified by retrieved instructions of a particular type. The event execution unit may control states of signals on the plurality of nodes in a manner specified by the retrieved instructions of the particular type in response to the second circuit identifying an output event.

REFERENCES:
patent: 3671875 (1972-06-01), Louis
patent: 3671945 (1972-06-01), Maggio, Jr.
patent: 3811092 (1974-05-01), Charbonnier
patent: 3889104 (1975-06-01), Smith
patent: 3974484 (1976-08-01), Struger et al.
patent: 3976980 (1976-08-01), Hertz
patent: 4306482 (1981-12-01), Kashio
patent: 4380802 (1983-04-01), Segar et al.
patent: 4431926 (1984-02-01), Mayumi
patent: 4525803 (1985-06-01), Vidalin et al.
patent: 4587415 (1986-05-01), Tsunekawa et al.
patent: 4644469 (1987-02-01), Sumi
patent: 5027315 (1991-06-01), Agrawal et al.
patent: 5127010 (1992-06-01), Satoh
patent: 5129067 (1992-07-01), Johnson
patent: 5134484 (1992-07-01), Willson
patent: 5214669 (1993-05-01), Zarembowitch
patent: 5220215 (1993-06-01), Douglas et al.
patent: 5254984 (1993-10-01), Wakeland
patent: 5269007 (1993-12-01), Hanawa et al.
patent: 5295188 (1994-03-01), Wilson et al.
patent: 5313644 (1994-05-01), Matsuo et al.
patent: 5337415 (1994-08-01), DeLano et al.
patent: 5424668 (1995-06-01), Kohsaka
patent: 5432853 (1995-07-01), Yamamoto
patent: 5481549 (1996-01-01), Tokuyama
patent: 5489918 (1996-02-01), Mosier
patent: 5602855 (1997-02-01), Whetsel, Jr.
patent: 5751984 (1998-05-01), Chang et al.
patent: 5838896 (1998-11-01), Han
patent: 5850533 (1998-12-01), Panwar et al.
patent: 5883592 (1999-03-01), Schepps et al.
patent: 5898853 (1999-04-01), Panwar et al.
patent: 5954811 (1999-09-01), Garde
patent: 5954816 (1999-09-01), Tran et al.
patent: 5968196 (1999-10-01), Ramamurthy et al.
patent: 5974500 (1999-10-01), Maletsky et al.
patent: 6026141 (2000-02-01), Lo
patent: 6097721 (2000-08-01), Goody
patent: 6119220 (2000-09-01), Sato
patent: 6285310 (2001-09-01), Michaelis et al.
patent: 6378022 (2002-04-01), Moyer et al.
patent: 6427024 (2002-07-01), Bishop
patent: 6449710 (2002-09-01), Isaman
patent: 6560754 (2003-05-01), Hakewill et al.
patent: 6651176 (2003-11-01), Soltis, Jr. et al.
patent: 6841983 (2005-01-01), Thomas
patent: 6856527 (2005-02-01), Srinivasan et al.
patent: 6976123 (2005-12-01), Regev et al.
patent: 7111152 (2006-09-01), Cofler et al.
patent: 7171631 (2007-01-01), Hakewill et al.
patent: 7266005 (2007-09-01), Syed et al.
patent: 7281119 (2007-10-01), Cofler et al.
patent: 7281147 (2007-10-01), Soltis, Jr. et al.
patent: 7318145 (2008-01-01), Stribaek et al.
patent: 7418580 (2008-08-01), Campbell et al.
patent: 7493470 (2009-02-01), Cumplido et al.
patent: 2003/0039135 (2003-02-01), Srinivasan et al.
patent: 2003/0145216 (2003-07-01), Nakane et al.
patent: 2003/0194003 (2003-10-01), Wittig
patent: 2004/0078551 (2004-04-01), Lichtenfels
patent: 2004/0128436 (2004-07-01), Regev et al.
patent: 2004/0199745 (2004-10-01), Schlansker et al.
patent: 2004/0264617 (2004-12-01), Goko
patent: 2005/0099877 (2005-05-01), Dybsetter et al.
patent: 2005/0114629 (2005-05-01), Altman et al.
patent: 2005/0169353 (2005-08-01), An et al.
patent: 2005/0257030 (2005-11-01), Langhammer
patent: 2006/0077275 (2006-04-01), Pan et al.
patent: 2006/0123295 (2006-06-01), Tanaka
patent: 2006/0152980 (2006-07-01), Chiueh et al.
patent: 2006/0233005 (2006-10-01), Schaefer et al.
patent: 2007/0107774 (2007-05-01), Jin et al.
patent: 2007/0234150 (2007-10-01), Jain et al.
patent: 2009/0006800 (2009-01-01), Bellofatto et al.
patent: 2009/0077109 (2009-03-01), Paris
patent: 0 715 252 (1996-06-01), None
Dixon, J.D. et al., “Programmable Instruction Cycle Time”IBM Technical Disclosure Bulletin, vol. 25, No. 5, p. 2705 (Oct. 1982).
“Selective Register Bit Set/Reset Mechanism”IBM Technical Disclosure Bulletin, vol. 30, No, 12, pp. 402-405 (May 1988).
Adelman, Y. et al., “600MHz DSP with 24Mb Embedded DRAM with an Enhanced Instruction Set for Wirelss Communication,” International Solid State Circuits Conference 2004.
Hennessy, J. et al., “Computer Architecture-A Quantitative Approach,” Fourth Edition, Morgan Kauffman 2007.
Olofsson, A. et al., “A 4.32GOPS 1W General-Purpose DSP with an Enhanced Instruction Set for Wireless Communication,” International Solid State Circuits Conferences 2002.
AD9920 12-Bit CCD Signal Processor with V-Driver andPrecision Timing™ Generator.
Blackfin DSP Users Guide, http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/manuals/resources/index.html.
TigerSharc DSP Users Guide, http://www.analog.com/en/embedded-processing-dsp/tigersharc/processors/manuals/resources/index.html.

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