Software-managed programmable associativity caching mechanism mo

Details Software-managed programmable associativity caching mechanism mo Software-managed programmable associativity caching mechanism mo

1997-04-14

2000-02-15

Cabeca, John W.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711118, 711137, 711146, G06F 1300

Patent

active

060264705

ABSTRACT:
A method of providing programmable associativity in a cache used by a processor of a computer system is disclosed. A congruence class of a memory block is defined using a first mapping function, providing a first associativity level of the cache. Program instructions in the processor select a second associativity level of a known appropriate level, and implement the second associativity level in the cache using a second mapping function. Application software may provide the program instructions, wherein the application software has procedures that may result in cache "strides" at particular associativity levels, and the known appropriate level is chosen to lessen memory latencies due to strides. Alternatively, the program instructions may be part of an operating system which monitors memory address requests, determines how efficient a procedure will operate at different associativity levels, and selects a most efficient level for the known appropriate level. The program instructions may select the associativity level by setting a value in a bit facility corresponding to the desired mapping function.

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