Software barrier synchronization

Details Software barrier synchronization Software barrier synchronization

2003-11-20

2009-08-25

Nguyen, Van H (Department: 2195)

Electrical computers and digital processing systems: virtual mac

Task management or control

Process scheduling

Reexamination Certificate

active

07581222

ABSTRACT:
The present invention provides an approach for barrier synchronization. The barrier has a first array of elements with each element of the first array having an associated process, and a second array of elements with each element of the second array having an associated process. Prior to use, the values or states of the elements in each array may be initialized. As each process finishes its phase and arrives at the barrier, it may update the value or state of its associated element in the first array. Each process may then proceed to spin at its associated element in the second array, waiting for that element to switch. When the values or states of the elements of the first array reach a predetermined value or state, an instruction is sent to all of the elements in the second array to switch their values or states, allowing all processes to leave.

REFERENCES:
patent: 5278975 (1994-01-01), Ishihata et al.
patent: 5448732 (1995-09-01), Matsumoto
patent: 5887167 (1999-03-01), Sutton
patent: 6263406 (2001-07-01), Uwano et al.

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