Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-08-05
2009-12-08
Torres, Joseph D (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
07631244
ABSTRACT:
A soft error correction method is for a memory system having memory access controllers accessing memories for storing byte-sliced data in cycle synchronism, and a system controller receiving a memory access from an arbitrary one of MPUs and issuing a memory address to the memory access controllers. When a correctable error is detected in data read from one memory, an error address where the error was detected is held within a memory access controller, and an error notification is made to the system controller from the memory access controller. In response to the error notification, the memory access controller holds the error address from the system controller without intervention from the MPUs, and reads, corrects and rewrites the data to the error address.
REFERENCES:
patent: 3781812 (1973-12-01), Wymore et al.
patent: 4174537 (1979-11-01), Chu et al.
patent: 4234918 (1980-11-01), Chu et al.
patent: 4255808 (1981-03-01), Schaber
patent: 4371949 (1983-02-01), Chu et al.
patent: 4394763 (1983-07-01), Nagano et al.
patent: 4920539 (1990-04-01), Albonesi
patent: 4955024 (1990-09-01), Pfeiffer et al.
patent: 5263032 (1993-11-01), Porter et al.
patent: 5331646 (1994-07-01), Krueger et al.
patent: 5412661 (1995-05-01), Hao et al.
patent: 5528755 (1996-06-01), Beardsley et al.
patent: 5951691 (1999-09-01), Ng et al.
patent: 6038676 (2000-03-01), Yanes et al.
patent: 6101614 (2000-08-01), Gonzales et al.
patent: 6349390 (2002-02-01), Dell et al.
patent: 6470421 (2002-10-01), Bui et al.
patent: 6711703 (2004-03-01), MacLaren et al.
patent: 6715116 (2004-03-01), Lester et al.
patent: 6965537 (2005-11-01), Klein et al.
patent: 2001/0044917 (2001-11-01), Lester et al.
patent: 2001/0047497 (2001-11-01), Larson et al.
patent: 2004/0199715 (2004-10-01), Ellis et al.
patent: 1149344 (1997-05-01), None
patent: 59-217298 (1984-12-01), None
patent: 2000-10871 (2000-01-01), None
patent: 10-2004-0086168 (2004-10-01), None
patent: 2004/104840 (2004-12-01), None
Office Action issued in corresponding Chinese Patent Application No. 2005100933550, on Jul. 27, 2007.
Korean Office Action, dated Oct. 26, 2006, and issued in related Korean Patent Application No. 10-2005-0076013.
European Search Report issued Jun. 10, 2009 in corresponding European Patent Application 05254873.2.
European Search Report issued Apr. 20, 2009 in corresponding European Patent Application 05254873.2.
Honda Yasufumi
Koguchi Takashi
Suzuki Kenji
Fujitsu Limited
Staas & Halsey , LLP
Torres Joseph D
LandOfFree
Soft error correction method, memory control apparatus and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Soft error correction method, memory control apparatus and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Soft error correction method, memory control apparatus and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4126007