Soft erasing methods for nonvolatile memory cells

Details Soft erasing methods for nonvolatile memory cells Soft erasing methods for nonvolatile memory cells

2008-03-18

2008-03-18

Nguyen, Tuan T. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185180, C365S185190, C365S185280

Reexamination Certificate

active

07345925

ABSTRACT:
Erasure methods for a nonvolatile memory cell that includes a gate electrode on a substrate, source and drain regions in the substrate at respective sides of the gate electrode, and a charge storage layer interposed between the gate electrode and the substrate. A nonzero first voltage is applied to the source region starting at a first time. While continuing to apply the first nonzero voltage to the source region, a second voltage having an opposite polarity to the first voltage is applied to the gate electrode starting at a second time later than the first time. The second voltage may increase in magnitude, e.g., stepwise, linearly and/or along a curve, after the second time.

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patent: 04-105368 (1992-04-01), None
patent: 10-261292 (1998-09-01), None
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