Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Including adhesive bonding step
Utility Patent
1999-01-06
2001-01-02
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Including adhesive bonding step
C438S106000, C257S181000
Utility Patent
active
06168976
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of electrical connectors; more particularly, to methods and apparatus for establishing a reliable electrical connection to an integrated circuit package.
BACKGROUND OF THE INVENTION
Modern microprocessor-based computer systems are commonly upgradable to improve performance and data processing capability. These computers include integrated circuits (ICs) that are mounted onto printed circuit boards (PCBs) by way of sockets to facilitate removal and installation of newer, higher-performing and more capable devices.
Conventional sockets have typically included connectors that apply a torsional force on the leads or pins of the integrated circuit package to establish electrical contact therebetween. An example of such a socket is found in U.S. Pat. No. 4,498,725. Other types of conventional sockets for use in mounting microprocessor and/or other board-mounted components, such as cache memories, to a PCB are described in U.S. Pat. Nos. 5,707,247; 4,950,980; 4,420,205 and 5,384,692.
A popular way of packaging microprocessors which is particularly well suited for establishing electrical connecting with a testing apparatus such a burn-in board is the ball grid array (BGA) package. As is well known, the manufacture of a BGA package involves attaching leadless solder balls to terminal pads (also referred to as land grid plates) that are arranged in a dense grid pad on one side of the package. A solder reflow process is employed to establish permanent electrical and mechanical connection between the solder balls and the terminal pads. Once made in this manner, the BGA package may be placed into a socket which cooperates with the ball contacts to allow the PCB to be mated/unmated with the package substrate over many cycles. Alternatively, the BGA component may be permanently soldered to plated lands on the PCB.
By way of example, U.S. Pat. Nos. 5,714,803 and 5,783,461 describe traditional ball grid array packages. Various types of sockets for establishing removable connections to solder balls of the BGA package are disclosed in U.S. Pat. Nos. 5,808,474; 5,812,378; 5,766,021; 5,805,419; 5,637,008; and 5,669,774.
One of the problems associated with traditional BGA packages is oxidation of the solder that coats the surface of the balls; this makes the solder ball unreliable as a separable contact surface. To overcome the insulating properties of the surface oxide layer, and thereby establish electrical contact for a socketable connection to the solder ball, past approaches have relied upon application of an extremely high pressure connections. In other words, a typical prior art approach is to forcibly press the solder balls down into the socket—almost to the point of deforming the shape of the solder ball itself. Such high pressure is necessary to break down the native oxide that exists on the outer surface of the solder ball, and also to ensure that the solder can not re-oxidize again once electrical contact has been established.
Another solution to combat the problem of surface oxidation of the solder balls utilizes palladium dendrites, which are plated onto copper vias that pass through a dielectric body of an interposer plate. The interposer plate provides electrical connection between the BGA package and plated lands of a circuit board. This technique is described in U.S. Pat. No. 5,691,041, which teaches that the dendrites penetrate the solder ball oxide layer to create a semi-permanent electrical connection. One of the drawbacks of this approach, however, is that with repeated connection cycles, the dendrites can become damaged thereby degrading the reliability of the connection.
The aforementioned problems have relegated socketable ball grid array packages to burn-in or test applications where contact is established only for the duration of the test. A socketable ball grade array package useful in a removable electrical connection that demands long-term reliability remains an elusive goal. Hence, there still is an unfulfilled need for a production socket that can make reliable contact to standard solder balls of a BGA package.
SUMMARY OF THE INVENTION
The present invention provides a socketable BGA package and a method for producing the same. According to one embodiment of the invented method, a plurality of socketable members are first placed into pockets or holes of a tray. For example, the socketable members may comprise copper balls plated with nickel and gold. The pockets or holes are sized such that when the members are inserted, an upper portion of the socketable member protrudes above a planar surface of the tray. The holes or pockets are arranged in a pattern that corresponds to an array of pads (i.e., lands) disposed on the package.
Next, a layer of material is applied over the socketable members and the planar surface of the tray. This layer of material provides a seal against the upper portion of each socketable member. A top area of the upper portion of each of the socketable members is exposed, and then plated with solder. During this latter step the layer of material acts as a barrier or dam that prevents the solder from being plated to any portion of the socketable member except the exposed top area.
Finally, the solder-plated top area of each of the members is bonded to the corresponding plurality of pads of the package. One way that this bonding step may be accomplished is by reflowing the solder to establish electrical contact between the top area of the member and the corresponding pad. Once again, the layer of material confines the solder to the top area thereby insuring a solder-free electrical contact area of the member.
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AMP, Single Lever (SL) ZIF Sockets for Intel Pentium™ Processors; Issued 3-94; 2 pages.
Haley Kevin J.
Moresco Larry
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Lee Calvin
Smith Matthew
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