Socket pin and socket for electrical testing of...

Details Socket pin and socket for electrical testing of... Socket pin and socket for electrical testing of...

1999-11-01

2002-05-28

Sherry, Michael J. (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S754090, C324S072500, C324S1540PB, C439S482000, C439S700000

Reexamination Certificate

active

06396294

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to electrical testing of semiconductor packages, and more particularly, to a socket pin and a socket for an electrical testing process.
2. Description of the Related Art
In general, effective electrical testing of a semiconductor package requires good contact between a test board and leads of the package. To achieve the required contacts, a test socket holds a semiconductor package for electrical testing.
The test socket commonly includes multiple socket pins on a socket board in a performance board of a tester. Each socket pin connects a lead of a semiconductor package to the tester for bi-directional passage of an electrical signal. A poor electrical contact or a contact failure, which may occur in the test socket, inhibits the transfer of electrical signals between the semiconductor package and the tester, so that a good chip may be evaluated as defective. Accordingly, a test socket providing a poor contact lowers the reliability of the electrical testing.
One of the major reasons for poor electrical contact is the wiping phenomenon. The wiping phenomenon refers to the mechanical and/or electrical deterioration of a socket pin, which arise from the wearing of a socket pin when inserting or removing a lead of a semiconductor package from contact with the socket pin.
FIG. 1
is a sectional view showing how a lead
59
of a semiconductor package
57
contacts a conventional C-type socket pin
53
of a test socket. Referring to
FIG. 1
, the left side of
FIG. 1
shows the semiconductor package
57
when first seated on the C-type socket pin
53
of a socket board
55
. To establish a good electrical contact, a pusher
51
applies a downward force to lead
59
. The downward force compresses socket pin
53
. The right side of
FIG. 1
shows the socket pin
53
after the downward force on lead
59
of semiconductor package
57
compresses the socket pin
53
.
When the pusher
51
applies the downwards (i.e., in a Y-axis direction) contact force to the lead
59
of the semiconductor package
57
, a portion A of the socket pin
53
elastically bends or flexes. The movement of portion A of pin
53
in a direction A′ causes friction and thereby causes the wiping phenomenon. As a result, a contact force Fc between the lead
59
and the socket pin
53
acts in a diagonal direction indicated on the right side of FIG.
1
.
The contact force Fc acting in the diagonal direction causes tin (Sn) coated on the surface of the lead
59
of the semiconductor package
57
to stick to the surface of the socket pin
53
. As the electrical test is repeated for several packages, the size of a tin flake stuck to the surface of the socket pin
53
increases. This flake can cause an electrical short with another neighboring socket pin (not shown). Also, the tin flake may stick to the lead of the semiconductor package
57
, causing a visual defect on the lead
59
of the semiconductor package
57
.
FIG. 2
is a sectional view showing how a lead
79
of a semiconductor package
77
contacts a conventional POGO-type socket pin
73
of a test socket on a socket board
75
.
Referring to
FIG. 2
, the left side of
FIG. 2
shows seating of the lead
79
of the semiconductor package
77
on the POGO-type socket pin
73
. A pusher
71
applies a force in the Y-axis direction (downward), and
FIG. 2
shows how the downward stroke of the pusher
71
compresses a spring
74
in the POGO pin
73
.
In
FIG. 2
, a contact force Fc acts only in the Y-axis direction, without causing friction. As the result, the wiping phenomenon, short failures, and visual defects that tin flakes cause when using the conventional C-type socket pin, do not occur when using the POGO pin
73
. However, the POGO pin has no self cleaning mechanism capable of removing materials that oxidation or contamination can leave at the pin surface in contact with the lead
79
of the semiconductor package
77
. Thus, when the surface of the POGO pin is oxidized or contaminated, an open failure can occur during an electrical test, resulting in mis-evaluation of a good chip as a defective chip. As a result, the reliability of the electrical test is lower, and mis-evaluation of chips results in lower yields and additional manufacturing costs.
SUMMARY OF THE INVENTION
In accordance with an aspect of the present invention, a socket pin for electrical testing of semiconductor packages has a shortened wiping distance. The shorter wiping distance suppresses open/short defects of the socket pins resulting from the wiping phenomenon, and thereby improves chip yield and accuracy in the testing and reduces visual defects and manufacturing costs.
In accordance with one embodiment of the present invention, a socket pin in a socket for electrical testing of semiconductor packages includes: an upper portion; a body connected to the upper portion; a lower portion connected to the body; and a lower socket pin connected to the lower portion of the socket pin. The upper portion is for connection to a lead of a semiconductor package. The body buffers a downwards force that the lead of the semiconductor package applies to the upper portion of the socket pin, and in response to the downward force, the body flexes at two points.
The lower portion is elastically durable to the force from the upper portion and the body of the socket pin, and the lower socket pin acts as a path for transmitting or receiving an electrical signal.
Preferably, the body of the socket pin has a curved shape so as to absorb well the impact generated from pressing on the lead of the semiconductor package, and more preferably, the curved shape is an S-type curve.
The socket pin can be manufactured by stamping using a press machine and plating a substrate of an alloy of beryllium A (Be) and copper (Cu), with nickel (Ni) and gold (Au) in sequence.
In accordance with another embodiment of the present invention, a socket for electrical testing of a semiconductor package, includes a plurality of socket pins, each having a structure including an upper portion, a body, a lower portion, and a lower socket pin. The structure of each socket pin is capable of dispersing and buffering a contact force from a lead of the semiconductor package and flexes at a minimum of two points. The socket further includes a main body as a molded frame, into which the lower socket pins of the socket pins are inserted and fixed, and in which the lower portions of the socket pins are fitted. The main body allows a space around each socket pin such that the body and the upper portion of the socket pin can move within a predetermined range.
Preferably, the main body of the socket is nonconductive, and prevents electrical shorts between adjacent socket pins.
Preferably, the main body of the socket has a structure that limits the wiping distance of the upper portion of the socket pin. The wiping occurs when the body of the socket pin absorbs a primarily impact.
According to an aspect of the present invention, during electrical testing of a semiconductor package, open/short defects due to the defects of a socket pin, are reduced, increasing the yield of the packages passing the electrical testing and improving accuracy in the electrical testing. Also, the visual defects on the leads of semiconductor packages, due to tin flakes stuck on the leads, are reduced or prevented.


REFERENCES:
patent: 4012094 (1977-03-01), VanRenssen et al.
patent: 4887969 (1989-12-01), Abe
patent: 5218292 (1993-06-01), Goto
patent: 5504435 (1996-04-01), Perego
patent: 5952843 (1999-09-01), Vinh
patent: 5055415 (1993-03-01), None
Patent Abstract of Japan JP5055415 Supplied from the esp@cenet Database, May. 1993.

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