Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
Reexamination Certificate
2005-12-13
2005-12-13
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
Addressing cache memories
C711S118000
Reexamination Certificate
active
06976117
ABSTRACT:
A processor system having cache array for storing virtual tag information and physical tag information and corresponding comparators associated with the array to determine cache-hits. Information from the virtual tag array and the physical tag array may be accessed together.
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Clark Lawrence T.
Patterson Dan W.
Strazdus Stephen J.
Intel Corporation
Nguyen Hiep T.
Parker Lanny L
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