Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-12-27
2005-12-27
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S113000
Reexamination Certificate
active
06981099
ABSTRACT:
A method and system for the smart prefetching of instructions is disclosed. The method includes computing an effective memory latency of a request for data and using the effective memory latency to compute an effective address from which to prefetch data.
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Goil Sanjay
Paulraj Dominic A.
Bataille Pierre-Michel
Hamilton & Terrile LLP
Sun Microsystems Inc.
Terrile Stephen A.
Tsai Sheng-Jen
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