Small signal memory system with reference signal

Static information storage and retrieval – Read/write circuit – Differential sensing

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365205, 365210, G11C 700, G11C 706

Patent

active

042701902

ABSTRACT:
A memory array of cells produces output signals having either one of a high value (i.e. V.sub.H) or a low value (i.e. V.sub.L). The difference between V.sub.H and V.sub.L is significantly less than the operating voltage (e.g. V.sub.DD) applied across the memory cells and V.sub.H and V.sub.L are offset towards one of the voltage rails (e.g. V.sub.DD or ground ). The memory cell output signals are compared to a reference signal (V.sub.R) derived either from a "dummy" cell or from a memory cell being sensed, where V.sub.R has a value which is less positive than V.sub.H but more positive than V.sub.L. The reference signal and a memory cell signal, are applied to a sense amplifier which is responsive to a relatively small difference between the two signals and which can produce an output (V.sub.O) which is approximately symmetrical with respect to the mid point (V.sub.DD /2) of the operating voltage. A signal (V.sub.H) more positive than V.sub.R causes V.sub.O to be more positive than V.sub.DD /2 and a signal (V.sub.L) less than V.sub.R causes V.sub.O to be less positive than V.sub.DD /2. Thereby, high speed sensing, amplification and centering of the small, offset, memory signals are achieved simultaneously.

REFERENCES:
patent: 3600609 (1971-08-01), Christensen
patent: 4031524 (1977-06-01), Heeren
patent: 4136292 (1979-01-01), Suzuki et al.

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