Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
Reexamination Certificate
2007-05-15
2011-11-15
Bullock, Jr., Lewis (Department: 2196)
Electrical computers and digital processing systems: virtual mac
Task management or control
Process scheduling
C718S106000
Reexamination Certificate
active
08060881
ABSTRACT:
A barrier with local spinning. The barrier is described as a barrier object having a bit vector embedded as a pointer. If the vector bit is zero, the object functions as a counter; if the vector bit is one, the object operates as a pointer to a stack. The object includes the total number of threads required to rendezvous at the barrier to trigger release of the threads. The object points to a stack block list that describes each thread that has arrived at the barrier. Arriving at the barrier involves reading the top stack block, pushing onto the list a stack block for the thread that just arrived, decrementing the thread count, and spinning on corresponding local memory locations or timing out and blocking. When the last thread arrives at the barrier, the barrier is reset and all threads at the barrier are awakened for the start of the next process.
REFERENCES:
patent: 5434995 (1995-07-01), Oberlin et al.
patent: 5692193 (1997-11-01), Jagannathan et al.
patent: 6330619 (2001-12-01), Kreuzburg
patent: 7487501 (2009-02-01), Silvera et al.
patent: 7512950 (2009-03-01), Marejka
patent: 7844973 (2010-11-01), Dice
patent: 2002/0138507 (2002-09-01), Shuf et al.
patent: 2004/0187118 (2004-09-01), Blainey et al.
patent: 2005/0050374 (2005-03-01), Nakamura et al.
patent: 2005/0080981 (2005-04-01), Archambault et al.
patent: 2005/0081204 (2005-04-01), Schopp
patent: 2006/0190510 (2006-08-01), Gabryjelski et al.
patent: 2007/0016905 (2007-01-01), Rector et al.
Busy-Wait Barrier Synchronization Using Distributed Counters with Local Sensor Guansong Zhang, Francisco Martinez, Arie Tal, and Bob Blainey WOMPAT 2003, LNCS 2716, pp. 84-98 Year of publication 2003.
A Quantitative Architectural Evaluation of Synchronization Algorithms and Disciplines on ccNUMA Systems: The Case of the SGI Origin2000 Dimitrios S. Nikolopoulos and Theodore S. Papatheodorou Year of publication: 1999.
“Scalable Shared Memory Scalable Shared Memory Systems”, http://www.lrr.in.tum.de/˜weidendo/lehre/CSE-ScShM-05/06ScSMS.pdf.
Dusseau, et al., “Effective Distributed Scheduling for Parallel Scheduling for Parallel Workloads”, Date: 2005, http://www.cs.umd.edu/class/fall2005/cmsc714/Lectures/saha-scheduling-2up.pdf.
Martinez, et.al., “Speculative synchronization: programmability and performance for parallel codes”, Date: 2003, http://iacoma.cs.uiuc.edu/iacoma-papers/ieemicro03.pdf.
Schlatter, Kevin, “Shared Memory”, Date: 2001, http://carbon.cudenver.edu/csprojects/CSC5809S01/Synch/event.html.
Clift Neill M.
Kishan Arun U.
Bullock, Jr. Lewis
Microsoft Corporation
Mills Paul
LandOfFree
Small barrier with local spinning does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Small barrier with local spinning, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Small barrier with local spinning will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4286103