Small and power-efficient cache that can provide data for...

Details Small and power-efficient cache that can provide data for... Small and power-efficient cache that can provide data for...

2006-02-09

2008-08-12

Sparks, Donald (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S118000, C713S323000

Reexamination Certificate

active

07412570

ABSTRACT:
A small and power-efficient buffer/mini-cache sources and sinks selected DMA accesses directed to a memory space included in a coherency domain of a microprocessor when cached data in the microprocessor is inaccessible due to any or all of the microprocessor being in a low-power state not supporting snooping. Satisfying the selected DMA accesses via the buffer/mini-cache enables reduced power consumption by allowing the microprocessor (or portion thereof) to remain in the low-power state. The buffer/mini-cache may be operated (temporarily) incoherently with respect to the cached data in the microprocessor and flushed before deactivation to synchronize with the cached data when the microprocessor (or portion thereof) transitions to a high-power state that enables snooping. Alternatively the buffer/mini-cache may be operated in a manner (incrementally) coherent with the cached data. The microprocessor implements one or more processors having associated cache systems (such as various arrangements of first-, second-, and higher-level caches).

REFERENCES:
patent: 6697916 (2004-02-01), Lasserre et al.
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patent: 2005/0005073 (2005-01-01), Pruvost et al.
patent: 2005/0114559 (2005-05-01), Miller
patent: 2007/0038850 (2007-02-01), Matthews et al.
patent: WO9844405 (1998-10-01), None
patent: WO9850846 (1998-11-01), None

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