Slurry-less polishing for removal of excess interconnect...

Details Slurry-less polishing for removal of excess interconnect... Slurry-less polishing for removal of excess interconnect...

2006-11-28

2006-11-28

Lindsay, Jr., Walter (Department: 2812)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C438S691000, C438S693000, C257SE21304, C257SE21576

Reexamination Certificate

active

07141502

ABSTRACT:
A method for Chemical-Mechanical Polishing utilizes a two step process. The first step utilizes a slurry with abrasive particles which become embedded into a conditioned polishing pad having small cavities in the surface. During the second step the slurry flow is discontinued and the final polishing is performed using the embedded small abrasive particles. Using this method dishing has been reduced considerably, and has enabled the fabrication of a Damascene metal gate NMOSFET fabricated with Atomic Layer Deposition (ALD).

REFERENCES:
patent: 5441598 (1995-08-01), Yu et al.
patent: 6638145 (2003-10-01), Hall et al.
patent: 6709981 (2004-03-01), Grabbe et al.
patent: 7041599 (2006-05-01), Li et al.
patent: 2002/0052064 (2002-05-01), Grabbe et al.
patent: 2003/0109200 (2003-06-01), Hall et al.
patent: 2003/0162399 (2003-08-01), Singh
patent: 2003/0207582 (2003-11-01), Twu et al.
patent: 2004/0058546 (2004-03-01), Hall
patent: 2004/0229461 (2004-11-01), Darsillo et al.

Affiliated with

Also associated with

Rating

Slurry-less polishing for removal of excess interconnect... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Slurry-less polishing for removal of excess interconnect..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Slurry-less polishing for removal of excess interconnect... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3626017