Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2007-07-24
2007-07-24
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C709S238000
Reexamination Certificate
active
11218963
ABSTRACT:
A method and apparatus includes identifying a first portion of a first message in a first slice of a switch, the first message associated with a first priority, the first portion of the first message including a first routing portion specifying a network resource; identifying a second portion of the first message in a second slice of the switch, the second portion of the first message including the first routing portion; identifying a first portion of a second message in the first slice, the second message associated with a second priority, the first portion of the second message including a second routing portion specifying the network resource; identifying a second portion of the second message in the second slice, the second portion of the second message including the second routing portion; selecting, independently in each slice, the same one of the first and second messages based on the first and second priorities; sending the first portion of the selected message from the first slice to the network resource specified by the one of the first and second routing portions corresponding to the selected message; and sending the second portion of the selected message from the second slice to the network resource specified by the one of the first and second routing portions corresponding to the selected message.
REFERENCES:
patent: 5581777 (1996-12-01), Kim et al.
patent: 5689506 (1997-11-01), Chiussi et al.
patent: 6282583 (2001-08-01), Pincus et al.
patent: 2002/0075884 (2002-06-01), Wellen
Kimura Scott
Purcell Stephen Clark
Knoll Clifford
Perveen Rehana
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