Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2007-11-16
2009-08-25
Barnie, Rexford N (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S082000, C326S086000, C326S087000, C327S108000, C327S109000
Reexamination Certificate
active
07579873
ABSTRACT:
An interface driver circuit comprises N cascaded delay cells, each including a data bit input, a delayed data bit output that communicates with the data bit input of an adjacent one of the N cascaded delay cells, and a delay time input that sets delay values between receiving data at the data bit input and generating the delayed data bit output. N predrivers receive an output enable signal that is independent of the data, receive a corresponding one of the N delayed data bit outputs and generate a predriver output signal based on the output enable signal and the corresponding one of the N delayed data bit outputs.
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Chan Sang Kong
Jiang Bin
Barnie Rexford N
Marvell International Ltd.
Tran Thienvu V
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