Skew tolerant communication between ratioed synchronous clocks

Details Skew tolerant communication between ratioed synchronous clocks Skew tolerant communication between ratioed synchronous clocks

2008-03-06

2010-06-08

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C327S142000, C327S145000

Reexamination Certificate

active

07733130

ABSTRACT:
A data communications system is disclosed. The data communications system comprises two clock domains. Each of the clock domains are coupled to receive a source clock signal. The first clock domain includes a first clock signal and the second clock domain includes a second clock signal, each of the first clock signal and the second clock signal are derived from the source clock signal. The first clock signal has a frequency which is different from that of the second clock signal. The system includes circuitry configured to generate a pulse indicative of when data transferred between the first clock domain and the second clock domain may be latched. Data is only latched when the pulse is asserted and on a given edge of the first clock signal, and the circuitry is configured to generate the pulse such that the given edge occurs at approximately a position corresponding to a middle of a period of the second clock signal.

REFERENCES:
patent: 5694556 (1997-12-01), Neal et al.
patent: 6044207 (2000-03-01), Pecone et al.
patent: 6049887 (2000-04-01), Khandekar et al.
patent: 6128669 (2000-10-01), Moriarty et al.
patent: 6226704 (2001-05-01), Wang et al.
patent: 6320436 (2001-11-01), Fawcett et al.
patent: 6748039 (2004-06-01), Bates
patent: 7084685 (2006-08-01), Lin et al.
patent: 2007/0076830 (2007-04-01), Hasan et al.
Motorola, Inc., Semiconductor Technical Data, “Dynamic Switch PLL Clock Driver,” Sep. 1997, pp. 1-6.

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