Skew compensating interface for operation with arbitrary data

Details Skew compensating interface for operation with arbitrary data Skew compensating interface for operation with arbitrary data

2001-01-29

2004-03-09

Dildine, R. Stephen (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Skew detection correction

Reexamination Certificate

active

06704890

ABSTRACT:

FIELD OF THE INVENTION
The present invention is concerned with digital data transmission and especially with systems, methods and apparatus for detecting and correcting skew in data streams transmitted over a signal path, especially from a transmitter end to a receiver end of the path. The invention also encompasses transmitters, receivers, transmission methods and reception methods, all for detecting and correcting skew in data streams for transmission over a path. The invention further comprises signals and signal paths carrying such signals.
BACKGROUND OF THE INVENTION
The present specification describes techniques and functions applicable to the implementation of a general purpose, skew compensating interface that, for convenience, has been given the acronym RAUDI (“Reference Aligned Universal Digital Interface”). RAUDI will find particular application in systems having bitstreams with data rates above 2.5G bits/second, but is applicable to any data rate where an application is otherwise compromised by any type of timing skew.
In telecommunications systems the most obvious (but not the only) application will be in the Physical Layer. The techniques used in the RAUDI enable significant functionality, specifically but not exclusively:
The interface is non-intrusive; it neither affects payload throughput nor the payload continuity even if payload flow is continuous (there is no flow control). It is thus transparent to higher level functions.
Operation is independent of the overlying payload format and application, i.e. it is format agnostic.
The features and hence complexity can be chosen and widely and flexibly distributed to suit both the application and the available implementation technologies.
Any implementation scales well with data rate, with skew magnitude, with bus width and with rate of change of skew.
The overhead associated with the skew compensation process is minimal.
These collective functions offer advantages over other, known skew compensating schemes as will become apparent.
GENERAL INTRODUCTION/BACKGROUND
Referring to
FIG. 1
, a schematic diagram of a digital data communication link is depicted. A transmit side or transmit interface, generically indicated at TX, inserts a plurality of bitstreams
0
to n into a transmission channel for reception at a receive side, or receive interface, generically indicated at RX. The individual bitstreams collectively define a data bus. There is significance in the relative position of the bits in the respective bitstreams forming the bus. This relative positioning needs to be preserved at the receive end RX if the received data is to be useful to the recipient. However, the data channel imposes variable delays on the bitstreams such that the data bits in the bit-streams are no longer in the same relative time/phase position as they were at the transmit end. This phenomenon is known in the art as skew. Measures have to be taken to restore the bitstreams into the same relative position that they had at the transmit end. This restoration is known in the art as skew compensation or skew correction.
All bits in a bus are notionally valid within a given window of time. The position in time of these bits with respect each other can be significant in data communications and so must be controlled if the significance is not to be lost. In a synchronous transmit/receive system, the values on each bit are sampled at fixed intervals to re-align them but if the data is sampled when the data is invalid, errors will occur.
The spread in the delay Introduced across all bits of an interface and its associated communications medium is called the overall skew of the bus. Different skews also exist between individual bits within the bus and these cannot exceed the overall skew. That part of the skew which is equal to a whole number of bit periods is defined as gross skew; the remaining skew, which is less than one bit period, is defined as the fractional skew. A simplified representation of skew is shown in FIG.
3
. Throughout the present specification, the sum of the gross and fractional skew is collectively defined as skew.
Skew is not fixed and can change over time (quickly or slowly) depending on many factors, such as temperature. Since these external factors are often outside the scope of any control, they are a fundamental issue in high speed data communication.
Traditional low speed interfaces are able to transfer data words as a bus across a communications medium without introducing significant delay between individual bits. If all bits in a word can be transferred across an interface and associated communications medium such that all individual bits are correctly aligned to within 1 bit period, a conventional synchronous interface can transfer data of any format without any overall skew-induced errors. This is indicated generically in
FIG. 4
, where it can be seen that the system requires a common clock to control data transfer at both the transmit and the receive ends of a communication channel.
As an aid to understanding the terminology employed in the art and in the present specification it may be useful to define terms as follows:
A medium is defined as any intervening substance, including free-space, that can be used as a mechanism for conveying information. Each medium requires a driver and a receiver that is compatible with both the medium and the technology used to implement the interface.
The combination of transmit interface, medium and receive interface is defined as a channel.
A signal path can be any path or route taken by a signal in passing from one location to another. This may be a communication channel, incorporating for example an electric cable, optical fibre and so on. Alternatively, it may include a storage device which can be static, such as RAM or other software type storage, or dynamic, such as tape and disk storage media. It may also include a computer network.
Skew can be introduced by all components of the path. As data rates have increased (and will continue to increase) and, with longer interconnects, media and implementation technologies are being pushed to the limits and it is often impossible to control the channel skew to within 1 bit period without some additional scheme for skew compensation. Even short path lengths introduce skew if data rates are high.
It will not be uncommon for skews of any magnitude to be introduced across a data bus such that the significance of individual bits within a bus sampled at a single instant appears to be lost. There is thus a very real need for techniques which can in some way measure, track (and compensate for), large amounts of skew, thus re-aligning the individual bits of a data bus and fully restoring them.
Skew can be present in a system as fractional skew, gross skew or both, depending on the position in the system and the timing schemes in force. It is thus important to understand the significance of any skew at each point in a system. Two main types of system are important here; a synchronous system and a plesiochronous system. Correctly designed asynchronous systems are naturally robust to timing errors and are not considered here.
Synchronous Systems
FIG. 5
depicts a synchronous system in which data is passed between perfect re-timing elements and sampled according to a common clock that is passed to both sides of the channel. As long as the skew between data and clock at points X is less than one bit period, the system performs as anticipated the relative position of bits is maintained and the fractional skew is removed by the re-timing element (the gross skew is zero). However, if the skew at X is 1 bit period, to within the uncertainty of the re-timing element, the re-timing element can choose to sample individual bits from one bit position or the next. There is thus an uncertainty as to the required value of the data bit and a 50% chance that the wrong data bit is sampled. Since the fractional skew is subject to variation and the clock can be subject to jitter, this can cause the sampled data Y to wander between clock cycles in an uncontrolled fa

Affiliated with

Also associated with

Rating

Skew compensating interface for operation with arbitrary data does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Skew compensating interface for operation with arbitrary data, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Skew compensating interface for operation with arbitrary data will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3261232