Six-input look-up table for use in a field programmable gate...

Details Six-input look-up table for use in a field programmable gate... Six-input look-up table for use in a field programmable gate...

2006-06-13

2006-06-13

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Sequential or with flip-flop

C326S037000, C326S038000, C326S039000, C326S040000, C326S041000, C326S047000, C716S030000, C706S050000

Reexamination Certificate

active

07061271

ABSTRACT:
A 6-input LUT architecture includes 64 memory cells, which store 64 corresponding data values. A set of 64 transmission gates is configured to receive the 64 four data values. A first input signal is applied to the set of 64 transmission gates, thereby routing 32 of the 64 data values. A set of 32 transmission gates is coupled to receive the 32 data values routed by the set of 64 transmission gates. A second input signal is applied to the set of 32 transmission gates, thereby routing 16 of the 32 data values. A 16:1 multiplexer receives the sixteen data values routed by the set of 32 transmission gates. Third, fourth, fifth and sixth input signals are applied to the 16:1 multiplexer, thereby routing one of the 16 data values as the output of the LUT.

REFERENCES:
patent: 6400180 (2002-06-01), Wittig et al.
patent: 6407576 (2002-06-01), Ngai et al.
patent: 6501296 (2002-12-01), Wittig et al.
patent: 6556042 (2003-04-01), Kaviani
patent: 6621298 (2003-09-01), Agrawal et al.
patent: 6667635 (2003-12-01), Pi et al.
patent: 2005/0146352 (2005-07-01), Madurawe
U.S. Appl. No. 10/639,874, filed Aug. 12, 2003, New et al.
Altera Corcporation; “Stratix II Device Family Data Sheet”; v1.0; published Feb. 2004; available from Altera Corporation, 101 Innovation Drive, San Jose, CA 95134; pp. 2-1 through 2-22.
Ralf Krueger and Brent Przybus; WP209 (v1.0); “Virtex Variable-Input LUT Architecture”; Jan. 12, 2004; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 1-6.
Xilinx, Inc.; “Virtex-II Platform FPGA Handbook”; published Dec. 2000, available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 46-53.
Anthony Cataldo and Ron Wilson; “FPGA vendors revise logic for sub-100-nm era”; EE Times; Feb. 2, 2004; downloaded from http://www.eetimes.com/story/OEG20040202S0019; pp. 1-4.
Xilinx, Inc.; “The Programmable Logic Data Book 1994”; published 1994; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 2-110 thru 2-111, no month.
U.S. Appl. No. 10/863,989, filed Jun. 8, 2004, Young et al.
U.S. Appl. No. 10/864,244, filed Jun. 8, 2004, Young et al.

Affiliated with

Also associated with

Rating

Six-input look-up table for use in a field programmable gate... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Six-input look-up table for use in a field programmable gate..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Six-input look-up table for use in a field programmable gate... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3642527