Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis
Reexamination Certificate
2000-03-08
2002-11-26
Butler, Dennis M. (Department: 2185)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
C713S322000, C713S600000
Reexamination Certificate
active
06487674
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of semiconductor devices. In particular, the present invention relates to an apparatus for allowing a single pin on a semiconductor device to serve a number of different functions.
BACKGROUND OF THE INVENTION
In semiconductor chip design, it is desirable to reduce the number of input, output, or voltage supply pins in order to reduce package size and reduce cost. It may also be desirable to provide a means for allowing a semiconductor device to enter a “sleep” or static mode in order to reduce power consumption during down periods. For example, such techniques are well known in lap top computers. However, other devices, such as portable medical devices, instruments, and the like, may benefit from the use of a sleep mode in order to reduce power consumption and/or increase battery life.
In addition, it is also useful to be able to send a “reset” command to a device in order to reset the device upon power up or when exiting a sleep mode. It may be useful to use such a reset signal to place all components within the device in an initial condition state such that the device operates properly. Test modes may also be useful to a system debugger as well as a user. If a device can be placed in a test configuration, useful data about the status and operability of the device may be obtained.
For a large device such as a microprocessor or the like, communicating sleep signals may not be as difficult, as a large number of pins are available for such use, or a sleep signal may be input to a data port on the device. However, for smaller devices (e.g., eight pins), such as an A/D converter, the use of extra pins for sleep signals may not be practical.
One alternative is to use a bi-directional data port to receive sleep signals as well as output data. For example, Cirrus Logic model 5525/5526 A/D converters may utilize a bi-directional data pins to output serial data as well as receive input data. A sleep signal may be sent to such-a pin as a data signal which may be interpreted by the device as a sleep command. Such a command may then be processed and the device placed in a sleep state.
However, not all such devices may be provided with a bi-directional data port. Moreover, not all such devices may be provided with circuitry necessary to interpret input commands and process them as sleep commands. In addition, a device outputting data through a serial port cannot receive such a sleep command until the data being output is completed. Thus, a requirement remains in the art for a technique sending sleep or resent commands without the use of an extra data pin or bi-directional data port.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus to allow a semiconductor device to utilize one signal pin for a number of different functions. In the preferred embodiment of the present invention, a data clock pin SCLK may be used to receive an SCLK signal as well as sleep and reset signals.
During normal operation, the SCLK input pin may receive the SCLK signal, a square wave type clock signal. However, the SCLK signal may also be coupled to a one-shot within the device. When signal SCLK is held high for a predetermined period of time, the one-shot is triggered and a SLEEP signal is generated. The device reacts to this SLEEP signal by entering a sleep mode.
Additionally, once the SCLK signal is taken low, the one-shot may output a RESET signal. This RESET signal resets the device into an initial condition state.
Other modes of operation, such as test modes and the like may be entered into by holding the SCLK signal high or low in conjunction with a predetermined logic level on another pin (e.g., VREF).
REFERENCES:
patent: 5508650 (1996-04-01), Grimm et al.
patent: 5719573 (1998-02-01), Leung et al.
patent: 5805401 (1998-09-01), Schuellein et al.
patent: 6167528 (2000-12-01), Arcoleo
patent: 6314550 (2001-11-01), Wang et al.
“Crystal CS5510/11/12/13 16 and 20-Bit, 8-Pin &Dgr;&Sgr; ADC”, Cirrus Logic, Inc., Sep. 1999.
“Linear Technology LTC2400 24-Bit &mgr;Power &Dgr;&Sgr;0 ADC in SO-8”, Linear Technology Corporation, 1998.
Johnston Jerome
Pastorello Douglas F.
White Joe
Bell Robert P.
Butler Dennis M.
Cirrus Logic Inc.
Lin Steven
Shifrin Dan
LandOfFree
Single wire interface for an analog to digital converter does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Single wire interface for an analog to digital converter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Single wire interface for an analog to digital converter will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2959763